FM24C64B
Equivalent AC Load Circuit
5.5V
AC Test Conditions
Input Pulse Levels
0.1 VDD to 0.9 VDD
10 ns
Input rise and fall times
Input and output timing levels
0.5 VDD
1700
Ω
Diagram Notes
Output
All start and stop timing parameters apply to both read and write
cycles. Clock specifications are identical for read and write cycles.
Write timing parameters apply to slave address, word address, and
write data bits. Functional relationships are illustrated in the relevant
data sheet sections. These diagrams illustrate the timing parameters
only.
100 pF
Read Bus Timing
tHIGH
tR
tSP
tF
tSP
tLOW
SCL
SDA
1/fSCL
tSU:SDA
tHD:DAT
tSU:DAT
tBUF
tDH
tAA
Stop Start
Acknowledge
Start
Write Bus Timing
tHD:DAT
SCL
tSU:DAT
tAA
tHD:STA
tSU:STO
SDA
Stop Start
Acknowledge
Start
Data Retention
Symbol
Parameter
Min
Max
Units
Years
Years
Years
Notes
TDR
@
@
@
+85ºC
+80ºC
+75ºC
10
19
38
-
-
-
Rev. 1.3
Feb. 2011
10 of 12
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
