Switching Characteristics (continued)
CC
V = 5V ± 5% (+5 Volt Option), Vcc = 3.3V ± 0.3V (+3.3 Volt Option), C = 50pf, T = 0 to 70°C (Commercial), -40 to 85°C (Industrial)
L
A
-12
-15
Symbol
Description
Units
Min
Max
64
Min
Max
64
t
t
t
t
t
t
t
Row Enable Active Time, Cache Hit (Row=LRR) Read Cycle
Refresh Period
8
10
ns
ms
ns
ns
ns
ns
ns
RE1
REF
Output Enable Don't Care From Row Enable (Write, Cache Miss), O/P Hi Z
Row Enable High to Output Turn-On After Write Miss
Row Precharge Time
9
0
10
0
RGX
RQX1
(2,6)
12
15
(7)
RP
20
8
25
10
100
Row Precharge Time, Cache Hit (Row=LRR) Read Cycle
Row Precharge Time, Self-Refresh Mode
RP1
RP2
100
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
0
12
35
12
12
0
0
15
40
15
15
0
Read Hold Time From Row Enable (Write Only)
Last Write Address Latch to End of Write
Row Enable to Column Address Latch Low For Second Write
Last Write Enable to End of Write
Column Address Cycle Time
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RRH
RSH
RSW
RWL
SC
Select Hold From Row Enable
SHR
(1)
SQV
Chip Select Access Time
12
12
8
15
15
10
(2,3)
SQX
0
0
0
0
Output Turn-On From Select Low
Output Turn-Off From Chip Select
Select Setup Time to Row Enable
Transition Time (Rise and Fall)
(4,5)
SQZ
SSR
T
5
5
1
1
10
10
12
5
15
5
Write Enable Cycle Time
WC
WCH
WHR
WI
Column Address Latch Low to Write Enable Inactive Time
Write Enable Hold After /RE
(7)
0
0
5
5
Write Enable Inactive Time
5
5
Write Enable Active Time
WP
(1)
WQV
12
12
12
15
15
15
Data Valid From Write Enable High
Data Output Turn-On From Write Enable High
Data Turn-Off From Write Enable Low
Write Enable Setup Time to Row Enable
Write to Read Recovery (Following Write Miss)
(2,5)
WQX
0
0
5
0
0
5
(3,4)
WQZ
WRP
WRR
16
18
(1) V Timing Reference Point at 1.5V
OUT
(2) Parameter Defines Time When Output is Enabled (Sourcing or Sinking Current) and is Not Referenced to V or V
OH
OL
(3) Minimum Specification is Referenced from V and Maximum Specification is Referenced from V on Input Control Signal
IH
IL
(4) Parameter Defines Time When Output Achieves Open-Circuit Condition and is Not Referenced to V or V
OH
OL
(5) Minimum Specification is Referenced from V and Maximum Specification is Referenced from V on Input Control Signal
IL
IH
(6) Access Parameter Applies When /CAL Has Not Been Asserted Prior to t
RAC2
(7) For Back-to-Back /F Refreshes, t = 40ns. For Non-consecutive /F Refreshes, t = 25ns and 32ns Respectively
RP
RP
(8) For Write-Per-Bit Devices, t
is Limited By Data Input Setup Time, t
WHR
DS
2-84
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
