RA8863
Preliminary Version 1.1
Dot Matrix LCD Controller
5.2 LCD Driver Interface
Pin Name
FR
LP
CDATA
HSCP
HOD
I/O
O
O
O
O
O
Description
Frame
Latch
Latch pulse for column driver. Shift clock pulse for Row Driver
Synchronous Data
Synchronous Data
for Row Driver.
Shift Clock Pulse
Shift clock pulse for Column Driver in upper area of LCD.
Data Output
Data output for Odd Columns in upper area of LCD.
Data Output
SDSEL
= High
area of LCD.
SDSEL
= Low
LCD.
Display On
Data output for even columns in both upper and lower
Data output for columns in both upper and lower area of
ED
O
DSPON
O
Display On/Off control signal. When
HALT
or
RST
is Low, DSPON output
Low (LCD Display Off).
5.3 Memory Interface
Pin Name
A[15:0]
D[7:0]
MCE
I/O
O
I/O
O
Description
Address Output for External Memory
Data Bus for External Memory
Memory Chip Enable
MCE
= Low
Memory Enable.
MRW
O
CE0
LOD
O
CE1
LSCP
VDD
GND
O
MCE
= High
Memory Disable.
Memory Read/Write Control
MRW = Low
Memory Write Enable.
MRW = High
Memory Read Enable.
Memory Chip Enable 0
If
DUAL
= High
Chip enable pin for display memory in the address
range 0000~07FFh.
If
DUAL
= Low
Serial data output for odd columns in lower area of LCD.
Memory Chip Enable 1
Chip enable pin for display memory in the address
If
DUAL
= High
range 0800~0FFFh.
If
DUAL
= Low
Shift clock output for Column Driver in lower area of
LCD.
P
P
Power
Ground
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