RA8802/8820
Version 1.1
Character/Graphic LCD Controller
Usually connect to MCU address bus A0.
The MCU will access Instruction Register when RS is high and access
Data Register when RS is low.
CS1#
CS2
INT
I
Chip select pin.
The RA8802/8820 is active when CS1# is low and CS2 is high
Interrupt signal
Active high or low Interrupt signal
Active high or low busy signal.
BUSY
O
The RA8802/8820 can’t be access when BUSY pin is high.
It’s should be connected to MCU I/O input. The MCU have to poll this pin
before accessing RA8802/8820.
4.2 Driver Interface
Pin Name
YD
I/O
O
LCD Driver control signal
YD will produce a pulse at the starting address of each Frame.
AC-converting signal input for LCD driver waveform.
FRM
O
Normally inputs a frame inversion signal
The LCD driver output pin’s output voltage level can be set to the line
latch output signal and the FR signal
For Column:
Latch pulse input pin for display data
LP
O
▪Data
is latched on the falling edge of the clock pulse.
For Row:
Bi-directional shift register shift clock pulse input pin
▪Data
is shift on the falling edge of the clock pulse.
XCK
O
Shift clock signal for LCD driver IC.
Data is shifted on the falling edge of the XCK.
Display off control signal used to control LCD power supply or backlight.
The pin is controlled by LCR bit 2. The status of this pin is the same as
LCR bit 2.
Alternative function pin LD7/SYS_MI.
LD7
SYS_MI
I/O
It’s connected to LCD driver IC D7, when 8-bit LCD driver IC is used.
SYS_MI is for CPU type selection. It’s active on reset period. Non-Pull
when 6800 MCU is used. Pull low when 8080 MCU series are used.
Alternative function pin LD6/SYS_DB.
LD6
SYS_DB
It’s connected to LCD driver IC D6, when 8-bit LCD driver IC is used.
I/O
SYS_DB is for MCU data bit selection. Non-Pull when 8-bit CPU is used.
Pull low when 4-bit CPU is used. The high nibble data bus DB[7..4]
Should tied to GND When 4-bit CPU is used.
Description
O
DISPOFF
O
RAiO
TECHNOLOGY INC.
4/7
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