RA6963
Preliminary Version 1.3
External RAM Write
Dot Matrix LCD Controller
Clock
(X1)
A[15:0]
MCE
td1
td1
td4
td5
MRW
td6
td7
td9
D[7:0]
td8
< Figure 8-4 >
< Table 8-5 >
（VDD=+5V±5％,GND=0V,Ta= -20 to +70℃）
Item
Symbol
Test Conditions
Min.
--
Max.
Unit
Address Delay Time
td1
td2
td3
tDS
tDH
td4
td5
td6
td7
td8
td9
--
--
--
--
--
--
--
--
--
--
--
250
180
180
--
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MCE Fall Delay Time(Read)
MCE Rise Delay Time(Read)
Data Setup Time
--
--
--
Data Hold Time
--
--
MCE Fall Delay Time(Write)
MCE Rise Delay Time(Write)
MRW Fall Delay Time
MRW Rise Delay Time
Data Stable Time
--
200
200
180
180
450
200
--
--
--
--
Data Hold Time
--
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