Table 5.1 Setups Block
Setups data is sent from the host to the QT in a block of hex data. The block can only be loaded in Setups mode following two 0x 01 commands (page 14). The devices this
datasheet pertain to have the same block length. Refer also to Table 5.4, page 26 for further details, and all of Section 5.
Item
#
Key
Default
Byte Parameter
Symbol Bytes Valid range Bits Scope Value Description
Page
20
Neg thresh
0
NTHR
PTHR
NDRIFT
PDRIFT
NDIL
NTHR = 0..15
PTHR = 0..15
NDRIFT = 0..15
PDRIFT = 0..15
NDIL = 0..15
4
4
4
4
4
4
1
1
1
1
1
1
6
2
Lower nibble = Neg Threshold - take operand and add 4 to get value
Upper nibble = Pos Threshold - take operand and add 4 to get value
Lower nibble = Neg Drift comp - Via LUT
1
2
3
4
48
48
48
48
Pos Thresh
20
Neg Drift Comp
48
10
4
20
21
21
Pos Drift Comp
Upper nibble = Pos Drift comp - Via LUT
Normal DI Limit
96
2
Lower nibble = Normal DI Limit, values same as operand (0 = disabled burst)
Upper nibble = Fast DI Limit, values same as operand (0 does not work)
Range is in 0.5 sec increments; 0 = infinite; default = 10s (operand = 20)
Range is { infinite, 0.5...127s }; 255 is illegal to use
Lower nibble = PRD, via LUT, default = 6 (1 sec)
Fast DI Limit
FDIL
FDIL = 0..15
5
144 Neg recal delay
Pos recal delay
NRD
0..254
8
1
20
PRD
BL
PRD = 0..15
BL = 0..3
4
2
1
1
4
2
1
4
4
1
1
6
2
0
0
1
1
0
0
0
21
22
22
22
22
22
22
23
Burst Length
Bits 5, 4: = BL, via LUT, default = 48 (setting =2)
5
192
48
AKS
AKS
AKS = 0, 1
1
Bit 6 = AKS, 1 - enabled
Scope Sync
Neg Hysteresis
240 Dwell Time
Mains Sync
SSYNC
NHYST
DWELL
MSYNC
BS
SSYNC = 0, 1
NHYST = 0..3
DWELL = 0..2
MSYNC = 0, 1
BS = 0..11
1
Bit 7 = Scope sync, 1 = enabled
48
48
48
48
device
Lower nibble = Neg hysteresis, all keys; default = 12.5%
Bits 5, 4 = Dwell time, 3 values via LUT, default = 187.5ns
Bits 6 = Mains sync, negative edge, 1 = enabled; default = 0 (off)
Lower nibble = burst spacing; default = 0 (automatic)
6
7
1
1
Burst spacing
241
Serial rate
SR
SR = 0..4
Upper nibble = serial rate via LUT - 9600, 19.2K, 38.4K, 57.6K, 115.2K (UART) 23
Lower limit of acceptable signal; below this value, device declares an error.
8
9
242 Lower signal Limit
244 LED Function
245 Host CRC
LSL
LED
2
1
0..2047
0..255
0..65K
16
8
48
100
0x6c
-
23
The low order byte should be sent first.
device
device
Controls what the LED does; see table, below.
23
23
CRC-16 of above setups, does NOT include CRC of command itself. The low
order byte should be sent first. See also CRC notes, page 29.
10
HCRC
2
16
Block length
247
CRC Note: A CRC calculator for Windows is available free of charge from Quantum Research on request.
lQ
24
QT60486-AS R8.01/0105
QUANTUM [ QUANTUM RESEARCH GROUP ]
