5 EPLD SOURCE LISTING
Source listing for a ICT PEEL22CV10AZ epld. The EPLD functions to generate control signals for the QS3125 quad n-channel switch, to
clamp unused Y lines during scanning, and to control the Y gate dwell time after the rise of an X line. This latter feature allows for moisture
suppression since the charge transfer duration decreases (and thus is less responsive to the slow-moving charges from resistive water films)
with decreasing dwell time. Rt and Ct (R21 and C12 in the E6S3) govern this delay time after the rise of any X line.
_________________________________________________________
TITLE 'E6S3'
DESIGNER 'H Philipp & S Brunet'
DATE '12/03/01'
PEEL22CV10A
"I/O CONFIGURATION DECLARATION
"IOC (PIN_NO
"Inputs
'PIN_NAME'
POLARITY
OUTPUT_TYPE
FEEDBACK_TYPE )
XS1 PIN 8
XS2 Pin 7
XS3 Pin 6
XS4 Pin 5
XS5 Pin 4
XS6 Pin 3
XS7 Pin 2
XS8 Pin 1
YS2 PIN 9
YS3 Pin 10
YS4 PIN 11
YS1 Pin 13
"externally OR'd X inputs (8)
"Outputs
"Clamping outputs
IOC ( 22'Y1'
IOC ( 20'Y2'
IOC ( 19'Y3'
IOC ( 17'Y4'
"QS3125 drives
IOC ( 23'F1'
IOC ( 21'F2'
IOC ( 18'F3'
IOC ( 16'F4'
Pos
Pos
Pos
Pos
Com
Com
Com
Com
Feed_Pin )
Feed_Pin )
Feed_Pin )
Feed_Pin )
Pos
Pos
Pos
Pos
OutCom Feed_Pin )
OutCom Feed_Pin )
OutCom Feed_Pin )
OutCom Feed_Pin )
"Dly ckt in (& reset of delay cap drive out)
IOC ( 14 'XSD'
"Dly ckt drive out
IOC ( 15 'XSS'
Pos
Com
Feed_Pin )
Pos
OutCom Feed_Pin )
AR NODE 25 "Global Asynchronous Reset
SP NODE 26 "Global Synchronous Preset
EQUATIONS
AR = 0;
SP = 0;
y4.com = 0;
y3.com = 0;
y2.com = 0;
y1.com = 0;
y4.oe = !ys4;
y3.oe = !ys3;
y2.oe = !ys2;
y1.oe = !ys1;
" Clamp outputs
" drive outs to gnd when not used.
xss.com = xs1 # xs2 # xs3 # xs4 # xs5 # xs6 # xs7 # xs8; "sum all of x to drive out delay ckt
xsd.com = 0;
xsd.oe = !(xs1 # xs2 # xs3 # xs4 # xs5 # xs6 # xs7 # xs8); "clamp the delay cap when all 'xs' lines are 0
F4.com = !(ys4 & !xsd);
F3.com = !(ys3 & !xsd);
F2.com = !(ys2 & !xsd);
F1.com = !(ys1 & !xsd);
" enables to 3125 are active low
LQ
10
QT60320C R1.08/01.03
QUANTUM [ QUANTUM RESEARCH GROUP ]
