T
ABLE
2-1 S1 S
PEED
/ S
YNC
O
PTIONS
- SNS1K P
IN
4
Fast / Spread Spectrum
Slow / Sync
Vss
Vdd
Mains frequency is one common source of interference. A
simple AC zero-crossing detector feeding the SYNC pin is
enough to suppress this kind of periodic noise. Multiple
devices tied to SYNC can be synchronized to the mains
frequency in this fashion.
If two physically adjacent devices are to be synchronized to
each other, they should be connected via the SYNC pin to a
clock source that is slower than the burst rate of either
device. For example, a 50Hz clock can synchronize two
QT240’s running with burst spacings of up to 10ms each.
The two QT240’s should be synchronized on opposite
phases of the clock source, ie the clock source should feed
one part and its inverted phase, the other part.
A sync pulse on SYNC/SS in slow mode acts to break the
QT240 out of its sleep state between bursts, and to do
another burst. The device will then go back to sleep again
and await a new SYNC pulse. If a Sync pulse does not arrive
within about 90ms, it will wake again and run normally.
External sync pulses can be used to accelerate response
time (at the expense of power) in Slow mode. Sync pulses
running at 25Hz for example will improve response time by a
factor of 2. Sync cannot be used to slow down the device.
Sync Mode Effects on Timings:
In the absence of a Sync
signal, the Max On-Duration timings and drift compensation
rates in Slow mode are nominally correct. It should be
understood that the Max On-Duration timings and drift
compensation rates are slaved to the burst interval in Slow
mode, and that changing the burst interval will have direct
effects on these parameters.
Since the most common use of Sync is to synchronize the
device to Mains frequency (50 or 60Hz) the device makes an
assumption that the presence of a Sync signal is at 55Hz,
and the timings are made to be correct at this frequency.
Should the Sync pulses vary from this frequency, the Max
On-Duration timings and drift compensation rates will vary
proportionately. Thus, if the Sync pulses are 25Hz, the
10-second Max On-Duration timing will become 10*55/25 =
22 seconds nominal. Only at Sync=55Hz will the 10s timeout
be 10s (the same as if there were no Sync signal, or the
device was in Fast mode).
T
ABLE
2-2 OPT O
PTIONS
S2
S3
SNS3K pin 20 SNS4K pin 18
DC Out
DC Out
Toggle
DC Out
Max On-Duration
Vss
Vdd
Vdd
Vss
Vdd
Vss
Vdd
Vss
10s
60s
10s
infinite
Timings assume 100 kHz operation
Response time can also be modified by changing the
oscillator frequency (Section 3.3).
Recalibration / toggle select (S2, S3):
See Table 2-2.
There are 3 recalibration timing options (‘Max On-Duration’;
see Section 2.1.3) and one toggle mode option. The
recalibration options control how long it takes for a
continuous detection to trigger a recalibration on a key.
When such an event occurs, only the ‘stuck’ key is
recalibrated. S2 / S3 should be connected as shown in Table
2-2 to achieve the desired Max On-Duration of either 10s,
60s, or infinite.
Toggle option:
One option is toggle mode, which allows all
four keys to behave with flip-flop action. In this mode, each
key’s corresponding OUT pin will toggle High / Low with
successive touches on the key. The underlying Max
On-Duration is 10s in this mode. If a timeout occurs in
Toggle mode, the toggle state is not affected. Toggle state
flips only when the corresponding Out pin goes High.
This is useful for controlling power loads, for example in
kitchen appliances, power tools, light switches, etc . or
wherever a ‘touch-on / touch-off’ effect is required.
2.3 SYNCHRONIZATION
Sync capability is only present in Slow mode (Section 2.2). If
SYNC is not desired, SYNC/SS should be connected to Vss.
Adjacent capacitive sensors that operate independently can
cross-interfere with each other in ways that will create
sensitivity shifts and spurious detections. Since Quantum’s
QT devices operate in burst mode, the opportunity exists to
solve this problem by time-sequencing sensing channels so
that physically adjacent keys do not sense at the same time.
Within the QT240 the four channels operate synchronously,
so it is not possible for these channels to cross interfere.
However 2 or more adjacent chips will cross-interfere if they
are not synchronized to each other. The same is true of the
effects of unsynchronized external noise sources.
External noise sources can also be heavily suppressed by
synchronizing the QT240 to the noise source period. External
noise creates an ‘aliasing’ or ‘beat’ frequency effect between
the sampling rate of the QT part and the external noise
frequency. This shows up as a random noise component on
the internal signals, which in turn can lead to false activation.
3 - CIRCUIT GUIDELINES
3.1 CS SAMPLE CAPACITOR
Charge sampler caps Cs can be virtually any plastic film or
low to medium-K ceramic capacitor. The ‘normal’ Cs range is
4.7nF to 47nF depending on the sensitivity required; larger
values of Cs require higher stability to ensure reliable
sensing. Acceptable capacitor types for most uses include
plastic film (especially PPS film and polypropylene film) and
X7R ceramic. Lower grades than X7R are not advised;
higher-K ceramics have nonlinear dielectrics which induce
instabilities.
3.2 POWER SUPPLY, PCB LAYOUT
The power supply can range from 3.9 to 5. 5 volts. If this
fluctuates slowly with temperature, the device will track and
compensate for these changes automatically with only minor
changes in sensitivity. If the supply voltage drifts or shift
quickly, the drift compensation mechanism will not be able to
keep up, causing sensitivity anomalies or false detections.
lQ
5
QT240R R1.10/0905
QUANTUM [ QUANTUM RESEARCH GROUP ]
