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QT110-DG 参数 Datasheet PDF下载

QT110-DG图片预览
型号: QT110-DG
PDF下载: 下载PDF文件 查看货源
内容描述: QTOUCH⑩传感器IC [QTOUCH⑩ SENSOR IC]
分类和应用: 传感器
文件页数/大小: 12 页 / 382 K
品牌: QUANTUM [ QUANTUM RESEARCH GROUP ]
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Figure 2-4  
Getting HB pulses with a pull-down resistor  
Figure 2-5  
Using a micro to obtain HB pulses in either output state  
+2.5 to 5  
HeartBeat™ Pulses  
1
PORT_M.x  
2
3
4
7
5
6
Vdd  
2
3
4
7
5
6
OUT  
SNS2  
GAIN  
SNS1  
OUT  
SNS2  
GAIN  
SNS1  
R
o
Ro  
Microprocessor  
OPT1  
OPT2  
OPT1  
OPT2  
PORT_M.y  
Vss  
8
the load is turned off, the supply rises and the object is  
reacquired, ad infinitum. To prevent this occurrence, the output  
should only be lightly loaded if the device is operated from an  
unregulated supply, e.g. batteries. Detection ‘stiction’, the  
opposite effect, can occur if a load is shed when Out is active.  
to reduce stray loading (which will dramatically reduce  
sensitivity).  
2. Keep Cs, Rs, and Re very close to the IC.  
3. Make Re as large as possible. As a test, check to be sure  
that an increase of Re by 50% does not appreciably  
decrease sensitivity; if it does, reduce Re until the 50%  
test increase has a negligible effect on sensitivity.  
The output of the QT110 can directly drive a resistively limited  
LED. The LED should be connected with its cathode to the  
output and its anode towards Vcc, so that it lights when the  
sensor is active-low. If desired the LED can be connected from  
Out to ground, and driven on when the sensor is inactive, but  
only with less drive current (1mA).  
4. Do not route the sense wire near other ‘live’ traces  
containing repetitive switching signals; the sense trace will  
pick up noise from them.  
3.3 POWER SUPPLY, PCB LAYOUT  
See also Section 3.4.  
3 - CIRCUIT GUIDELINES  
3.1 SAMPLE CAPACITOR  
The power supply can range from 2.5 to 5.0 volts. At 2.5 volts  
current drain averages less than 10µA with Cs = 10nF,  
provided a 470K Rs resistor is used (Figure 2-6). Idd curves  
are shown in Figure 4-4.  
When used for most applications, the charge sampler Cs can  
be virtually any plastic film or good quality ceramic capacitor.  
The type should be relatively stable in the anticipated  
temperature range. If fast temperature swings are expected,  
especially at higher sensitivity, a more stable capacitor might  
be required for example PPS film.  
Higher values of Cs will raise current drain. Higher Cx values  
can actually decrease power drain. Operation can be from  
batteries, but be cautious about loads causing supply droop  
(see Output Drive, Section 2.2.6) if the batteries are  
unregulated.  
In most moderate applications a low-cost X7R type will work  
fine.  
As battery voltage sags with use or fluctuates slowly with  
temperature, the IC will track and compensate for these  
changes automatically with only minor changes in sensitivity.  
3.2 ELECTRODE WIRING  
See also Section 3.4.  
The wiring of the electrode and its connecting trace is important  
to achieving high signal levels and low noise. Certain design  
rules should be adhered to for best results:  
If the power supply is shared with another electronic system,  
care should be taken to assure that the supply is free of digital  
spikes, sags, and surges which can adversely affect the  
device. The IC will track slow changes in Vdd, but it can be  
affected by rapid voltage steps.  
1. Use a ground plane under the IC itself and Cs and Rs but  
NOT under Re, or under or closely around the electrode or  
its connecting trace. Keep ground away from these things  
if desired, the supply can be regulated using a conventional  
low current regulator, for example CMOS LDO regulators that  
have nanoamp quiescent currents. Care should be taken that  
the regulator does not have a minimum load specification,  
which almost certainly will be violated by the QT110's low  
current requirement. Furthermore, some LDO regulators are  
unable to provide adequate transient regulation between the  
quiescent and acquire states, creating Vdd disturbances that  
will interfere with the acquisition process. This can usually be  
solved by adding a small extra load from Vdd to ground, such  
as 10K ohms, to provide a minimum load on the regulator.  
Figure 2-6 Eliminating HB Pulses  
GATE OR  
MICRO INPUT  
2
3
4
7
5
6
CMO S  
OUT  
SNS2  
GAIN  
SNS1  
Co  
100pF  
OPT1  
OPT2  
Conventional non-LDO type regulators are usually more stable  
than slow, low power CMOS LDO types. Consult the regulator  
manufacturer for recommendations.  
For proper operation a 100nF (0.1uF) ceramic bypass  
capacitor must be used between Vdd and Vss; the bypass cap  
LQ  
6
QT110 R1.04/0405