Internet Data Sheet
HYS[64/72]T[32/64/128]xx0HU-[25F/2.5/3/3S/3.7/5]-B
Unbuffered DDR2 SDRAM Module
Product Type
Organization
256MB
512MB
512MB
1 GByte 1 GByte
×64
×64
×72
×64
×72
1 Rank
1 Rank
1 Rank
2 Ranks 2 Ranks
(×16)
(×8)
(×8)
(×8)
(×8)
Label Code
PC2–
3200U–
333
PC2–
3200U–
333
PC2–
3200E–
333
PC2–
3200U–
333
PC2–
3200E–
333
JEDEC SPD Revision
Rev. 1.2 Rev. 1.2 Rev. 1.2 Rev. 1.2 Rev. 1.2
Byte#
Description
HEX
HEX
HEX
HEX
HEX
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
PLL Relock Time
00
54
72
4B
25
33
1C
34
27
3E
1B
30
00
00
00
00
12
6D
7F
7F
7F
7F
7F
51
00
50
7A
3B
27
36
1E
38
2A
38
1D
21
00
00
00
00
12
8B
7F
7F
7F
7F
7F
51
00
50
7A
3B
27
36
1E
38
2A
38
1D
21
00
00
00
00
12
9D
7F
7F
7F
7F
7F
51
00
50
7A
3B
27
36
1E
38
2A
38
1D
21
00
00
00
00
12
8C
7F
7F
7F
7F
7F
51
00
50
7A
3B
27
36
1E
38
2A
38
1D
21
00
00
00
00
12
9E
7F
7F
7F
7F
7F
51
TCASE.MAX Delta / ∆T4R4W Delta
Psi(T-A) DRAM
∆T0 (DT0)
∆T2N (DT2N, UDIMM) or ∆T2Q (DT2Q, RDIMM)
∆T2P (DT2P)
∆T3N (DT3N)
∆T3P.fast (DT3P fast)
∆T3P.slow (DT3P slow)
∆T4R (DT4R) / ∆T4R4W Sign (DT4R4W)
∆T5B (DT5B)
∆T7 (DT7)
Psi(ca) PLL
Psi(ca) REG
∆TPLL (DTPLL)
∆TREG (DTREG) / Toggle Rate
SPD Revision
Checksum of Bytes 0-62
Manufacturer’s JEDEC ID Code (1)
Manufacturer’s JEDEC ID Code (2)
Manufacturer’s JEDEC ID Code (3)
Manufacturer’s JEDEC ID Code (4)
Manufacturer’s JEDEC ID Code (5)
Manufacturer’s JEDEC ID Code (6)
Rev. 1.3, 2006-12
76
03292006-6GMD-RSFT
QIMONDA [ QIMONDA AG ]
