Internet Data Sheet
HYS72T[64/128/256]xx0HR–[3/3S/3.7/5]–A
Registered DDR2 SDRAM Modules
TABLE 31
SPD Codes for HYS72T[64/128]0x0HR–5–A
Product Type
Organization
512MB
×72
1 GByte
×72
1 GByte
×72
1 Rank (×8)
1 Rank (×4)
2 Ranks (×8)
Label Code
PC2–3200R–333 PC2–3200R–333 PC2–3200R–333
JEDEC SPD Revision
Rev. 1.1
HEX
Rev. 1.1
HEX
Rev. 1.1
HEX
Byte#
Description
0
Programmed SPD Bytes in EEPROM
Total number of Bytes in EEPROM
Memory Type (DDR2)
80
08
08
0E
0A
60
48
00
05
50
60
02
82
08
08
00
0C
04
38
00
01
04
01
50
80
08
08
0E
0B
60
48
00
05
50
60
02
82
04
04
00
0C
04
38
00
01
05
01
50
80
08
08
0E
0A
61
48
00
05
50
60
02
82
08
08
00
0C
04
38
00
01
05
01
50
1
2
3
Number of Row Addresses
Number of Column Addresses
DIMM Rank and Stacking Information
Data Width
4
5
6
7
Not used
8
Interface Voltage Level
9
t
t
CK @ CLMAX (Byte 18) [ns]
10
11
12
13
14
15
16
17
18
19
20
21
22
23
AC SDRAM @ CLMAX (Byte 18) [ns]
Error Correction Support (non-ECC, ECC)
Refresh Rate and Type
Primary SDRAM Width
Error Checking SDRAM Width
Not used
Burst Length Supported
Number of Banks on SDRAM Device
Supported CAS Latencies
DIMM Mechanical Characteristics
DIMM Type Information
DIMM Attributes
Component Attributes
t
CK @ CLMAX -1 (Byte 18) [ns]
Rev. 1.31, 2006-11
57
03292006-21GC-MK06
QIMONDA [ QIMONDA AG ]
