Internet Data Sheet
HYS64T[32/64/128]xxxEDL–[25F/…/3.7](–)B2
Small Outlined DDR2 SDRAM Modules
TABLE 28
HYS64T128x21EDL-25FB2
Product Type
Organization
HYS64T128021EDL–
25FB2
HYS64T128921EDL–
25FB2
1 GByte
×64
1 GByte
×64
2 Ranks (×8)
PC2–6400S–555
Rev. 1.2
HEX
2 Ranks (×8)
PC2–6400S–555
Rev. 1.2
HEX
Label Code
JEDEC SPD Revision
Byte#
Description
0
Programmed SPD Bytes in EEPROM
Total number of Bytes in EEPROM
Memory Type (DDR2)
80
08
08
0E
0A
61
40
00
05
25
40
00
82
08
00
00
0C
04
70
01
04
00
07
25
40
3D
50
32
1E
80
08
08
0E
0A
61
40
00
05
25
40
00
82
08
00
00
0C
04
70
01
04
00
07
25
40
3D
50
32
1E
1
2
3
Number of Row Addresses
Number of Column Addresses
DIMM Rank and Stacking Information
Data Width
4
5
6
7
Not used
8
Interface Voltage Level
9
t
t
CK @ CLMAX (Byte 18) [ns]
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
AC SDRAM @ CLMAX (Byte 18) [ns]
Error Correction Support (non-ECC, ECC)
Refresh Rate and Type
Primary SDRAM Width
Error Checking SDRAM Width
Not used
Burst Length Supported
Number of Banks on SDRAM Device
Supported CAS Latencies
DIMM Mechanical Characteristics
DIMM Type Information
DIMM Attributes
Component Attributes
t
t
t
t
t
t
CK @ CLMAX -1 (Byte 18) [ns]
AC SDRAM @ CLMAX -1 [ns]
CK @ CLMAX -2 (Byte 18) [ns]
AC SDRAM @ CLMAX -2 [ns]
RP.MIN [ns]
RRD.MIN [ns]
Rev. 1.1, 2007-01
40
08212006-PKYN-2H1B