Internet Data Sheet
HYS[64/72]T[32/64/128]xx0HU–[3/3S/3.7/5]–A
Unbuffered DDR2 SDRAM Modules
Ball No.
Name Pin
Buffer Function
Type Type
188
183
63
A0
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
Address Bus 12:0
A1
A2
182
61
A3
A4
60
A5
180
58
A6
A7
179
177
70
A8
A9
A10
AP
A11
A12
A13
57
176
196
Address Signal 13
Note: 1 Gbit based module and 512M ×4/×8
Not Connected
NC
A14
NC
NC
I
—
Note: Module based on 1 Gbit ×16 Module based on 512 Mbit ×16 or smaller
Address Signal 14
174
SSTL
—
Note: Modules based on 2 Gbit
NC
Not Connected
Note: Modules based on 1 Gbit or smaller
Data Signals
3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
Data Bus 63:0
Data Input/Output pins
4
9
10
122
123
128
129
Rev. 1.41, 2007-05
8
03292006-EZUJ-JY4S