Internet Data Sheet
HYI25D512160C[C/E/F/T]
512-Mbit Double-Data-Rate SDRAM
"!ꢃ
ꢀ
"!ꢀ
ꢃ
!ꢃꢄ
!ꢃꢃ
!ꢃꢀ
!ꢅ
!ꢂ
!ꢆ
!ꢇ
!ꢈ
!ꢁ
!ꢉ
!ꢄ
ꢀ
!ꢃ
$3
W
!ꢀ
$,,
W
/PERATING -/$%
W
REGꢊ ADDR
W
-0"4ꢀꢁꢅꢀ
TABLE 9
Extended Mode Register
Field
Bits
Type1)
Description
DLL Status
DLL
0
w
0B
1B
Enabled
Disabled
DS
1
Drive Strength
0B
1B
Normal
Weak
MODE
[12:3]
Operating Mode
00000000000 B Normal Operation
Notes
1. A2 must be 0 to provide compatibility with early DDR devices
2. All other bit combinations are RESERVED
1) w = write only register bit
Rev. 1.0, 2006-11
16
11082006-S9OT-UFSN