Internet Data Sheet
HY[B/I]18T512[40/80/16]0B2[C/F](L)
512-Mbit Double-Data-Rate-Two SDRAM
Parameter
Symbol
DDR2–400
Min.
Unit
Note1)2)3)4)5)
6)
Max.
11)
12)
10)
Clock half period
tHP
MIN. (tCL, tCH)
Data-out high-impedance time from CK / CK
Address and control input hold time
tHZ
—
tAC.MAX
—
ps
ps
tCK
tIH(base)
tIPW
475
0.6
Address and control input pulse width
(each input)
—
10)
13)
13)
Address and control input setup time
DQ low-impedance time from CK / CK
DQS low-impedance from CK / CK
Mode register set command cycle time
OCD drive mode output delay
tIS(base)
tLZ(DQ)
tLZ(DQS)
tMRD
350
—
ps
ps
ps
tCK
ns
2 × tAC.MIN
tAC.MAX
tAC.MAX
—
tAC.MIN
2
0
tOIT
12
Data output hold time from DQS
Data hold skew factor
tQH
t
HP –tQHS
—
tQHS
—
—
450
7.8
ps
µs
µs
ns
13)14)
15)17)
16)
Average periodic refresh Interval
Average periodic refresh Interval
tREFI
tREFI
—
3.9
Auto-Refresh to Active/Auto-Refresh
command period
105
—
Precharge-All (4 banks) command period
Read preamble
tRP
tRP
—
ns
tCK
tCK
ns
13)
tRPRE
tRPST
tRRD
0.9
0.40
7.5
1.1
0.60
—
13)
Read postamble
13)17)
Active bank A to Active bank B command
period
15)21)
Active bank A to Active bank B command
period
tRRD
10
—
ns
Internal Read to Precharge command delay
Write preamble
tRTP
7.5
—
ns
tCK
tCK
ns
tWPRE
tWPST
tWR
0.25
0.40
15
—
18)
Write postamble
0.60
—
Write recovery time for write without Auto-
Precharge
19)
20)
Internal Write to Read command delay
tWTR
10
2
—
—
ns
Exit power down to any valid command
(other than NOP or Deselect)
tXARD
tCK
20)
Exit active power-down mode to Read
command (slow exit, lower power)
tXARDS
tXP
6 – AL
2
—
—
tCK
tCK
Exit precharge power-down to any valid
command (other than NOP or Deselect)
Exit Self-Refresh to non-Read command
Exit Self-Refresh to Read command
tXSNR
tXSRD
WR
t
RFC +10
200
WR/tCK
—
—
—
ns
tCK
tCK
21)
Write recovery time for write with Auto-
Precharge
t
1)
VDDQ = 1.8 V ± 0.1 V; VDD = 1.8 V ±0.1 V.
2) Timing that is not specified is illegal and after such an event, in order to guarantee proper operation, the DRAM must be powered down
and then restarted through the specified initialization sequence before normal operation can continue.
Rev. 1.12, 2007-05
55
10062006-YPTZ-CDR7