Internet Data Sheet
HY[B/I]18T1G[40/80/16]0B[C/F](L/V)
1-Gbit Double-Data-Rate-Two SDRAM
5
Electrical Characteristics
This chapter describes the electrical characteristics.
5.1
Absolute Maximum Ratings
Caution is needed not to exceed absolute maximum ratings of the DRAM device listed in Table 28 at any time.
5.1.1
Absolute Maximum Ratings
Caution is needed not to exceed absolute maximum ratings of the DRAM device listed in Table 28 at any time.
TABLE 28
Absolute Maximum Ratings
Symbol
Parameter
Rating
Min.
Unit
Note
Max.
1)
VDD
Voltage on VDD pin relative to VSS
Voltage on VDDQ pin relative to VSS
Voltage on VDDL pin relative to VSS
Voltage on any pin relative to VSS
Storage Temperature
–1.0
–0.5
–0.5
–0.5
–55
+2.3
+2.3
+2.3
+2.3
+100
V
1)2)
1)2)
1)
VDDQ
VDDL
V
V
VIN, VOUT
TSTG
V
1)2)
°C
1) When VDD and VDDQ and VDDL are less than 500 mV; VREF may be equal to or less than 300 mV.
2) Storage Temperature is the case surface temperature on the center/top side of the DRAM.
Attention: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
TABLE 29
DRAM Component Operating Temperature Range
Symbol
Parameter
Rating
Min.
Unit
Note
Max.
TOPER
Operating Temperature
0
95
85
°C
°C
1)2)3)4) for HYB...
for HYI...
–40
1) Operating Temperature is the case surface temperature on the center / top side of the DRAM.
2) The operating temperature range are the temperatures where all DRAM specification will be supported. During operation, the DRAM case
temperature must be maintained between 0 - 95 °C under all other specification parameters.
3) Above 85 °C the Auto-Refresh command interval has to be reduced to tREFI= 3.9 µs
4) When operating this product in the 85 °C to 95 °C TCASE temperature range, the High Temperature Self Refresh has to be enabled by
setting EMR(2) bit A7 to “1”. When the High Temperature Self Refresh is enabled there is an increase of IDD6 by approximately 50%
Rev. 1.3, 2007-07
32
03062006-ZNH8-HURV
QIMONDA [ QIMONDA AG ]
