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HYE18L128160BC-7.5 参数 Datasheet PDF下载

HYE18L128160BC-7.5图片预览
型号: HYE18L128160BC-7.5
PDF下载: 下载PDF文件 查看货源
内容描述: DRAM的移动应用128兆移动-RAM [DRAMs for Mobile Applications 128-Mbit Mobile-RAM]
分类和应用: 内存集成电路动态存储器时钟
文件页数/大小: 55 页 / 1522 K
品牌: QIMONDA [ QIMONDA AG ]
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HY[B/E]18L128160B[C/F]-7.5  
128-Mbit Mobile-RAM  
Functional DescriptionCommands  
Table 14  
Timing Parameters for AUTO REFRESH and SELF REFRESH  
Parameter  
Symbol  
- 7.5  
Units  
ns  
Notes  
min.  
max.  
1)  
ACTIVE to ACTIVE command period  
PRECHARGE command period  
Refresh period (4096 rows)  
Self refresh exit time  
tRC  
67  
19  
tRP  
ns  
tREF  
tSREX  
64  
ms  
tCK  
1
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:  
no. of clock cycles = specified delay / clock period; round up to next integer.  
2.4.10  
POWER DOWN  
#,+  
#+%  
#3  
2!3  
#!3  
7%  
!ꢄꢀ!ꢅꢅ  
"!ꢄꢉ"!ꢅ  
ꢃ $ONgT #ARE  
Figure 45 Power Down Entry Command  
Power-down is entered when CKE is registered LOW (no accesses can be in progress). If power-down occurs  
when all banks are idle, this mode is referred to as precharge power-down; if power-down occurs when there is a  
row active in any bank, this mode is referred to as active power-down. Entering power-down deactivates the input  
and output buffers, excluding CLK and CKE. CKE LOW must be maintained during power-down.  
Power-down duration is limited by the refresh requirements of the device (tREF).  
The power-down state is synchronously exited when CKE is registered HIGH (along with a NOP or DESELECT  
command). One clock delay is required for power down entry and exit.  
Data Sheet  
40  
Rev. 1.71, 2007-01  
05282004-NZNK-8T0D  
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