Internet Data Sheet
HY[B/I]25D256[16/40/80]0C[E/C/F/T](L)
256 Mbit Double-Data-Rate SDRAM
TABLE 23
IDD Specification
Symbol –5
DDR400B
–6
–7
Unit Note/Test Condition1)
DDR333
Typ.
DDR266A
Typ.
Typ.
Max.
Max.
Max.
IDD0
IDD1
70
75
90
90
60
65
70
80
4
75
75
50
55
65
70
3
65
65
75
85
4
mA ×4/×82)3)
mA ×16 3)
mA ×4/×8 3)
mA ×16 3)
80
100
110
5
85
95
95
3)
IDD2P
IDD2F
IDD2Q
IDD3P
IDD3N
4
5
mA
3)
30
36
25
17
11
32
36
70
85
75
90
120
1.4
—
30
20
15
9
24
21
13
36
40
70
85
75
90
140
3.0
mA
3)
20
28
24
mA
3)
13
18
15
mA
3)
38
45
38
28
30
60
70
65
75
100
1.4
—
mA
43
54
45
mA ×16 3)
mA ×4/×8 3)
mA ×16 3)
mA ×4/×8 3)
mA ×16 3)
IDD4R
IDD4W
85
100
120
105
130
190
3.0
—
85
100
90
100
90
100
140
1.4
—
110
160
3.0
1.5
215
215
3)
IDD5
IDD6
mA
4)
mA
—
mA Low power5)
mA ×4/×8 3)
mA ×16 3)
IDD7
210
210
250
250
180
180
140
140
170
170
1) Test conditions for typical values: VDD = 2.5 V (DDR333), VDD = 2.6 V (DDR400), TA = 25 °C, test conditions for maximum values:
DD = 2.7 V, TA = 10 °C
DD specifications are tested after the device is properly initialized and measured at 133 MHz for DDR266, 166 MHz for DDR333, and
200 MHz for DDR400.
V
2)
I
3) Input slew rate = 1 V/ns.
4) Enables on-chip refresh and address counters.
5) Low power available on request
Rev. 2.3, 2007-03
32
03062006-8CCM-VPUW
QIMONDA [ QIMONDA AG ]
