Internet Data Sheet
HYB25DC512[80/16]0B[E/F]
Double-Data-Rate SDRAM
Ball#/Pin#
Name
Pin
Type
Buffer
Type
Function
42
A12
I
SSTL
Address Signal 12
Note: Module based on 256 Mbit or larger dies
Note: Module based on 128 Mbit or smaller dies
Address Signal 13
NC
NC
I
—
17
A13
SSTL
Note: 1 Gbit based module
NC
NC
—
Note: Module based on 512 Mbit or smaller dies
Power Supplies
49
VREF
AI
—
—
—
—
—
I/O Reference Voltage
I/O Driver Power Supply
Power Supply
3, 9, 15, 55, 61 VDDQ
1, 18, 33 VDD
6, 12, 52, 58, 64 VSSQ
PWR
PWR
PWR
PWR
Power Supply
34
VSS
Power Supply
TABLE 4
Abbreviations for Pin Type
Abbreviation
Description
I
Standard input-only pin. Digital levels
Output. Digital levels
I/O is a bidirectional input/output signal
Input. Analog levels
Power
O
I/O
AI
PWR
GND
NC
Ground
Not Connected
TABLE 5
Abbreviations for Buffer Type
Abbreviation
Description
SSTL
Serial Stub Terminalted Logic (SSTL2)
Low Voltage CMOS
LV-CMOS
CMOS
OD
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR
Rev. 1.2, 2007-04
7
04112007-FHBX-O8HD
QIMONDA [ QIMONDA AG ]
