Internet Data Sheet
HYB25D512[400/160/800]C[E/T/F/C](L)
512-Mbit Double-Data-Rate SDRAM
%
$
ꢅꢀ
%
$
ꢁꢀ
ꢅꢀ
Uꢀ
$
ꢅ
ꢆꢀ
$
ꢅ
ꢅꢀ
$
ꢅ
ꢁꢀ
$
ꢉꢀ
$
ꢇꢀ
DWLQ
Zꢀ
$
ꢊꢀ
$
ꢂꢀ
$
ꢋꢀ
$
ꢈꢀ
$
ꢌꢀ
$
ꢆꢀ
ꢁꢀ
Zꢀ
$
ꢅꢀ
'6
Zꢀ
$
ꢁꢀ
'//ꢀ
Zꢀ
ꢀ
ꢁꢀ
UH
2
SH
U
Jꢀ
02
'
(ꢀ
JꢃꢀD
G
G
0
3
%
7
ꢁ
ꢈꢉꢁꢀ
TABLE 9
Extended Mode Register
Field
DLL
Bits
Type1)
Description
DLL Status
0
w
0B
1B
Enabled
Disabled
DS
1
Drive Strength
0B
1B
Normal
Weak
MODE
[12:3]
Operating Mode
Note:
5. A2 must be 0 to provide compatibility with early DDR devices
6. All other bit combinations are RESERVED.
00000000000BNormal Operation
1) w = write only register bit
Rev. 1.31, 2006-09
17
03292006-3TFJ-HNV3
QIMONDA [ QIMONDA AG ]
