Internet Data Sheet
HYB25D512[400/160/800]C[E/T/F/C](L)
512-Mbit Double-Data-Rate SDRAM
Ball#/Pin#
Name
Pin
Type
Buffer
Type
Function
Data Signals ×16 organization
A8, 2
DQ0
DQ1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
Data Signal 15:0
B9, 4
B7, 5
DQ2
C9, 7
DQ3
C7, 8
DQ4
D9, 10
D7, 11
E9, 13
E1, 54
D3, 56
D1, 57
C3, 59
C1, 60
B3, 62
B1, 63
A2, 65
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Data Strobe ×16 organization
E3, 51
E7, 16
UDQS
LDQS
I/O
I/O
SSTL
SSTL
Data Strobe Upper Byte
Data Strobe Lower Byte
Data Mask ×16 organization
F3, 47
UDM
LDM
I
I
SSTL
SSTL
Data Mask Upper Byte
Data Mask Lower Byte
F7, 20
Power Supplies
F1, 49
VREF
AI
—
—
I/O Reference Voltage
A9, B2, C8, D2, VDDQ
E8, 3, 9, 15, 55,
61
PWR
I/O Driver Power Supply
A7, F8, M7, 1, VDD
18, 33
PWR
PWR
—
—
Power Supply
Power Supply
A1, B8, C2, D8, VSSQ
E2, 6, 12, 52,
58, 64
A3, F2, M3, 34 VSS
PWR
NC
—
—
—
—
Power Supply
Not Connected
A2, 65
NC
NC
NC
Not Connected
Note: ×4 organization
Not Connected
A8, 2
NC
Note: ×4 organization
Not Connected
B1, 63
NC
Note: ×8 and ×4 organisation
Rev. 1.31, 2006-09
9
03292006-3TFJ-HNV3