HYB25D256[400/800/160]B[T/C](L)
256-Mbit Double Data Rate SDRAM
Package Outlines
6
Package Outlines
11 x 1 = 11
0.18 MAX.
1
5)
B
5)
0.052)
3)
4)
1)
A
0.1 C
0.1 C
60x
ø0.15
ø0.08
±0.05
ø0.4
C SEATING PLANE
M
M
A B
C
1.52)
4.25
0.2
12
1) A1 Marking Ballside
2) A1 Marking Chipside
3) Dummy Pads without Ball
4) Bad Unit Marking (BUM)
5) Middle of Packages Edges
Figure 51 P-TFBGA-60-2 (Plastic Thin Fine-Pitch Ball Grid Array Package)
Data Sheet
81
Rev. 1.21, 2004-07
02102004-TSR1-4ZWW