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HYB18T1G400AF 参数 Datasheet PDF下载

HYB18T1G400AF图片预览
型号: HYB18T1G400AF
PDF下载: 下载PDF文件 查看货源
内容描述: 240引脚注册的DDR SDRAM模块 [240-Pin Registered DDR SDRAM Modules]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 40 页 / 2282 K
品牌: QIMONDA [ QIMONDA AG ]
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Internet Data Sheet  
HYS72T[128/256]00xHR–[3S/3.7/5]–A  
Registered DDR2 SDRAM Modules  
TABLE 16  
ODT AC Characteristics and Operating Conditions for DDR2-533 & DDR2-400  
Symbol  
Parameter / Condition  
Values  
Unit  
Note  
Min.  
Max.  
tAOND  
tAON  
ODT turn-on delay  
2
2
tCK  
ns  
ns  
tCK  
ns  
ns  
tCK  
tCK  
1)  
2)  
ODT turn-on  
tAC.MIN  
tAC.MAX + 1 ns  
tAONPD  
tAOFD  
tAOF  
ODT turn-on (Power-Down Modes)  
ODT turn-off delay  
t
AC.MIN + 2 ns  
2 tCK + tAC.MAX + 1 ns  
2.5  
2.5  
ODT turn-off  
tAC.MIN  
tAC.MAX + 0.6 ns  
tAOFPD  
tANPD  
tAXPD  
ODT turn-off (Power-Down Modes)  
ODT to Power Down Mode Entry Latency  
ODT Power Down Exit Latency  
t
AC.MIN + 2 ns  
2.5 tCK + tAC.MAX + 1 ns  
3
8
1) ODT turn on time min. is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time max is when  
the ODT resistance is fully on. Both are measured from tAOND, which is interpreted differently per speed bin. For DDR2-400/533, tAOND is  
10 ns (= 2 x 5 ns) after the clock edge that registered a first ODT HIGH if tCK = 5 ns.  
2) ODT turn off time min. is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high impedance.  
Both are measured from tAOFD. Both are measured from tAOFD, which is interpreted differently per speed bin. For DDR2-400/533, tAOFD is  
12.5 ns (= 2.5 x 5 ns) after the clock edge that registered a first ODT HIGH if tCK = 5 ns.  
3.4  
Currents Specifications and Conditions  
TABLE 17  
DD Measurement Conditions  
I
Parameter  
Symbol Note  
1)2)3)4)5)6)  
Operating Current 0  
IDD0  
One bank Active - Precharge; tCK = tCK.MIN, tRC = tRC.MIN, tRAS = tRAS.MIN, CKE is HIGH, CS is HIGH between  
valid commands. Address and control inputs are SWITCHING, Databus inputs are SWITCHING.  
Operating Current 1  
IDD1  
One bank Active - Read - Precharge; IOUT = 0 mA, BL = 4, tCK = tCK.MIN, tRC = tRC.MIN, tRAS = tRAS.MIN  
,
t
RCD = tRCD.MIN, AL = 0, CL = CLMIN; CKE is HIGH, CS is HIGH between valid commands. Address and  
control inputs are SWITCHING, Databus inputs are SWITCHING.  
Precharge Standby Current  
IDD2N  
All banks idle; CS is HIGH; CKE is HIGH; tCK = tCK.MIN; Other control and address inputs are SWITCHING,  
Data bus inputs are SWITCHING.  
Precharge Power-Down Current  
Other control and address inputs are STABLE, Data bus inputs are FLOATING.  
IDD2P  
IDD2Q  
Precharge Quiet Standby Current  
All banks idle; CS is HIGH; CKE is HIGH; tCK = tCK.MIN; Other control and address inputs are STABLE,  
Data bus inputs are FLOATING.  
Rev. 1.4, 2007-02  
27  
03062006-GD6J-14FP  
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