P4C1049/P4C1049L - HIGH SPEED 512K x 8 STATIC CMOS RAM
ac ElEctrical cHaractEriSticS—rEaD cYclE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
-15
-20
-25
-35
-45
-55
-70
Syꢇ Pꢃꢉꢃꢇeꢊeꢉ
uꢆꢀꢊ
mꢀꢆ mꢃx mꢀꢆ mꢃx mꢀꢆ mꢃx mꢀꢆ mꢃx mꢀꢆ mꢃx mꢀꢆ mꢃx mꢀꢆ mꢃx
tRC Read Cycle Time
15
20
25
35
45
55
70
ns
ns
tAA Address Access Time
15
15
20
20
25
25
35
35
45
45
55
55
70
70
Chip Enable Access
Time
tAC
ns
ns
ns
ns
ns
ns
ns
ns
ns
Output Hold from Ad-
dress Change
tOH
3
3
3
3
3
3
3
3
3
3
3
3
3
3
Chip Enable to Output in
Low Z
tLZ
Chip Disable to Output in
High Z
tHZ
8
7
9
9
11
10
15
15
20
20
25
25
30
30
Output Enable Low to
Data Valid
tOE
Output Enable Low to
Low Z
tOLZ
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Output Enable High to
High Z
tOHZ
7
9
10
25
15
35
20
45
25
55
30
70
Chip Enable to Power ꢁp
Time
tPꢁ
Chip Disable to Power
Down Time
tPD
15
20
timing WaVEForm oF rEaD cYclE no. 1 (OE controllED)(5)
timing WaVEForm oF rEaD cYclE no. 2 (aDDrESS controllED)(5,6)
Document # SRAM128 REV C
Page 4
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