AND1741MST
Intelligent Graphics Display
Power Supply
LCD panel is driven by the voltage V
DD
–V
EE
, so adjustable
V
EE
is required for contrast control and temperature
compensation.
Temperature Variations
Temperature
0°C
+25°C
+50°C
V
DD
–V
EE
(MST)
V
DD
–V
EE
(BST)
Timing Relationships and Diagram
Signal Timing Relationships
Item
C/D Set Up Time
C/D Hold Time
CE
,
RD
,
WR
Symbol
t
CDS
t
CDH
t
CE
t
RD
,t
WR
t
DS
t
DH
t
ACC
t
OH
Min.
100
10
80
80
40
–
10
Max.
–
–
–
–
–
150
50
Unit
21.0
19.5
17.6
20.0
18.5
16.6
Pulse Width
Data Set Up Time
Data Hold Time
Access Time
Output Hold Time
Timing Diagram
C/D
ns
t
CDS
CE
t
CP
,t
RD
,t
WP
RD, WR
t
DS
D0-D7
(WRITE)
D0-D7
(READ)
t
ACC
t
CDH
t
DH
t
OH
Block Diagram
8
D0-D7
WR
RD
CE
C/D
RESET
HSCP
FR
LP
CDATA
T6963C
D0-D7
13
R/W
CE1
ED
8
I/O0-I/O7
Because signal lines are directly connected
to C-MOS and are not pull-up or pull-down
internally, except RESET which is pull-up to
V
DD
, you must guard all signals from
external noise.
AD0-AD12
A0-A12
RAM
(8K byte)
X-Driver
X-Driver
X-Driver
Control Lines
80
80
80
64
Y-Driver
LCD
64
Y-Driver
V
FL
V
FL
Backlight
3
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085
Tel: 408.523.8200 • Fax: 408.733.1287 • sales@purdyelectronics.com • www.purdyelectronics.com
7/20/07
PURDY [ PURDY ELECTRONICS CORPORATION ]
