May 2007
rev 0.4
ASM3P622S00A/B/J/E/K
Spread Spectrum Frequency Generation
The clocks in digital systems are typically square waves
with a 50% duty cycle and as frequencies increase the
edge rates also get faster. Analysis shows that a square
wave is composed of fundamental frequency and
harmonics. The fundamental frequency and harmonics
generate the energy peaks that become the source of
EMI. Regulatory agencies test electronic equipment by
measuring the amount of peak energy radiated from the
equipment. In fact, the peak level allowed decreases as
the frequency increases. The standard methods of
reducing EMI are to use shielding, filtering, multi-layer
PCBs etc. These methods are expensive. Spread
spectrum clocking reduces the peak energy by reducing
the Q factor of the clock. This is done by slowly
modulating
the
clock
frequency.
The
ASM3P622S00A/B/J/E/K uses the center modulation
spread spectrum technique in which the modulated
output frequency varies above and below the reference
frequency with a specified modulation rate. With center
modulation, the average frequency is the same as the
unmodulated frequency and there is no performance
degradation
Timing-Safe™ technology
Timing-Safe™ technology is the ability to modulate a
clock source with Spread Spectrum technology and
maintain synchronization with any associated data path.
Pin Configuration
1
2
3
4
8
CLKIN
NC
NC
7
6
5
VDD
ASM3P622S00A/B
CLKOUT
SSON
SS%
GND
1
2
3
4
8
XIN / CLKIN
XOUT
NC
7
6
5
VDD
ASM3P622S00J
CLKOUT
SSON
SS%
GND
Low Frequency Timing-Safe™ Peak EMI Reduction IC
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Notice: The information in this document is subject to change without notice.