April 2008
rev 1.6
Block Diagram
D_C SRS FRS
VDD
ASM3P2811A/B
ASM3P2812A/B
ASM3P2814A/B
Modulation
XIN /CLKIN
Crystal
Oscillator
XOUT
Frequency
Divider
Feedback
Divide
PLL
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
VSS
Pin Configuration
XIN / CLKIN
1
VSS
2
D_C
3
SRS
4
ASM3P2811A/B
ASM3P2812A/B
ASM3P2814A/B
8
XOUT
VDD
FRS
ModOUT
7
6
5
Pin Description
Pin#
1
2
3
4
5
6
7
8
Pin Name
XIN / CLKIN
VSS
D_C
SRS
ModOUT
FRS
VDD
XOUT
Type
I
P
I
I
O
I
P
O
Description
Crystal connection or external Clock input.
Ground to entire chip.
Digital logic input used to select Down (LOW) or Center (HIGH) spread options.
(Refer
Frequency Deviation and Spread Selection Table).
This pin has an internal pull-up resistor.
Spread range select. Digital logic input used to select frequency deviation
(Refer
Frequency Deviation and Spread Selection Table).
This pin has an internal pull-up resistor.
Spread spectrum clock output
Frequency range select. Digital logic input used to select Input frequency range
(Refer
Input/Output Frequency Range Selection Table).
This pin has an internal pull-up resistor.
Power supply for the entire chip.
Crystal connection. If using an external reference, this pin must be left
unconnected.
Low Power EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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PULSECORE [ PulseCore Semiconductor ]
