February 2007
ASM3P2531A
rev 1.4
Schematic for a Typical Application
Input clock 27MHz – 55MHz
VDD
CLKIN
VDD
NC
NC
1
2
8
7
6
5
FB
FB : Optional ferrite bead
ASM3P2531A
0.1uF
NC
3
4
VSS
VDD
0 ꢀ
0 ꢀ
GND
ModOUT
STOP
EMI reduced clock output
27MHz – 55MHz
Use either pull-up or pull-down
resistors with 0Ω
Absolute Maximum Ratings
Symbol
VDD, VIN
Parameter
Voltage on any pin with respect to Ground
Rating
-0.5 to +4.6
Unit
V
TSTG
TA
Ts
Storage temperature
Operating temperature
Max. Soldering Temperature (10 sec)
Junction Temperature
-65 to +125
-40 to +85
260
°C
°C
°C
°C
TJ
150
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
TDV
2
KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Low Frequency EMI Reduction
3 of 8
Notice: The information in this document is subject to change without notice.