November 2006
rev 0.3
ASM2P3807A
ASM2P3807A
Unit
Conditions1
Min2
Max
Symbol
Parameter
tPLH
Propagation Delay
1.5
4
nS
tPHL
tR
Output Rise Time
1.5
1.5
nS
nS
tF
Output Fall Time
CL= 30pF
tSK(O)
Output skew: skew between outputs of
same package (same transition)
0.45
0.45
nS
nS
f≤ 67MHz
(See figure 3)
tSK(P)
Pulse skew: skew between opposite
transitions of same output (|tPHL – tPLH|)
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
tSK(T)
0.75
nS
ASM2P3807A
Symbol
Parameter
Conditions1
Unit
Min2
Max
tPLH
tPHL
tR
Propagation Delay
1.5
4.3
nS
Output Rise Time
Output Fall Time
1.5
1.5
nS
nS
tF
CL= 50pF
f≤ 40MHz
Output skew: skew between outputs of
same package (same transition)
tSK(O)
tSK(P)
0.35
0.35
nS
nS
(See figure 4)
Pulse skew: skew between opposite
transitions of same output (|tPHL – tPLH|)
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
tSK(T)
0.75
nS
NOTES:1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delays
limits do not imply skew.
3.3V CMOS 1-TO-10 CLOCK DRIVER
6 of 18
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
