November 2006
rev 0.3
ASM2P2351AH
1-Line To 10-Line Clock Driver With 3-State Outputs
Features
•
•
•
•
Low Output Skew, Low Pulse Skew for Clock-
Distribution and Clock-Generation Applications.
Operates at 3.3V Supply Voltage
.
LVTTL-Compatible Inputs and Outputs.
Supports Mixed-Mode Signal Operation.
(5V Input and Output Voltages With 3.3V Supply
Voltage).
•
•
•
•
Distributes One Clock Input to Ten Outputs.
Outputs have Internal Series Damping Resistor
to Reduce Transmission Line Effects.
Distributed
V
CC
and
Ground
Pins
Reduce
Switching Noise.
Package Options Include Plastic Small-Outline
and Shrink Small-Outline Packages.
Product Description
The ASM2P2351AH is a high-performance clock-driver
circuit that distributes one input (A) to ten outputs (Y)
with minimum skew for clock distribution. The output-
enable (OE) input disables the outputs to a high-
impedance state. Each output has an internal series
damping resistor to improve signal integrity at the load.
The ASM2P2351AH operates at nominal 3.3V Supply
Voltage.
The propagation delays are adjusted at the factory
using the P0 and P1 pins. The factory adjustments
ensure that the part-to-part skew is minimized and is
kept within a specified window. Pins P0 and P1 are not
intended for customer use and should be connected to
GND.
The ASM2P2351AH is characterized for operation
from 0
°
C to 70
°
C.
Pin Configuration
Logic Diagram (Positive Logic)
5
OE
23
21
19
18
6
A
7 8
PO P1
16
14
11
9
4
Y1
Y2
Y3
GND
Y10
V
CC
Y9
OE
Y4
Y5
Y6
Y7
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
GND
Y1
V
CC
Y2
GND
Y3
Y4
GND
Y5
V
CC
Y6
GND
A
P0
P1
Y8
V
CC
ASM2P2351AH
19
18
17
16
15
14
13
Y8
Y9
Y7
GND
2
Y10
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008
•
Tel: 408-879-9077
•
Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.