October 2006
rev 1.6
signals. The pushbutton input is debounced and is pulled
HIGH through an internal 40kΩ resistor.
When PBRST is held LOW for the minimum time t
PB
, both
resets become active and remain active for a minimum time
period of 250ms after PBRST returns HIGH.
ASM1832
minimum timeout period, reset signals become active. On
power-up after the supply voltage returns to an in-tolerance
condition, the reset signal remains active for 250ms
minimum,
allowing
the
power
supply
and
system
microprocessor to stabilize.
ST Pulses as short as 20ns can be detected.
The debounced input is guaranteed to recognize pulses
greater than 20ms. No external pull-up resistor is required,
since PBRST is pulled HIGH by an internal 40kΩ resistor.
The PBRST can be driven from a TTL or CMOS logic line or
shorted to ground with a mechanical switch.
RESET
ST
Valid
Strobe
Valid
Strobe
Invalid
Strobe
t
ST
t
RST
t
TD
(min)
t
TD
(max)
~
~
PBRST
t
PDLY
V
IL
t
PB
V
IH
Note: ST is ignored whenever a reset is active
Figure 5: Timing Diagram: Strobe Input
Timeouts periods of approximately 150ms, 610ms or
1,200ms are selected through the TD pin.
~
~
t
RST
RESET
RESET
TD Voltage level
V
OH
V
OL
Watchdog Time-out Period
(ms)
Min
Nom
150
610
1200
Max
250
1000
2000
Figure 3: Timing Diagram: Pushbutton Reset
~~
~~
Supply
Voltage
ASM1832
1
2
3
4
PBRST
T
D
TOL
GND
V
CC
8
ST
RESET
RESET
GND
Floating
V
CC
62.5
250
500
The watchdog timer can not be disabled. It must be strobed
with a high-to-low transition to avoid watchdog timeout and
I/O
7
6
5
reset.
µP
Supply
Voltage
ASM1832
1
2
3
4
PBRST
T
D
TOL
GND
V
CC
8
ST
RESET
RESET
MREQ
RESET
Figure 4: Application Circuit: Pushbutton Reset
7
6
5
µP
RESET
Address
Bus
Watchdog Timer and ST Input
A watchdog timer stops and restarts a microprocessor that is
“hung-up”. The µP must toggle the ST input within a set
period (as selectable through TD input) to verify proper
software execution. If the ST is not toggled low within the
Decoder
Figure 6: Application Circuit: Watchdog Timer
3.3V µP Power Supply Monitor and Reset Circuit
Notice: The information in this document is subject to change without notice
4 of 9
PULSECORE [ PulseCore Semiconductor ]
