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PT6584 参数 Datasheet PDF下载

PT6584图片预览
型号: PT6584
PDF下载: 下载PDF文件 查看货源
内容描述: LCD驱动IC [LCD Driver IC]
分类和应用: 驱动
文件页数/大小: 42 页 / 555 K
品牌: PTC [ PRINCETON TECHNOLOGY CORP ]
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Tel:886-2-66296288  
Fax:886-2-29174598  
URL:http://www.princeton.com.tw  
LCD Driver IC  
PT6584  
PIN DESCRIPTION  
Handling  
Pin No.  
Pin Name I/O Active  
when  
Description  
QFP  
LQFP  
unused  
S1/P1  
S2/P2  
S3/P3  
S4/P4  
S4 ~ S53  
COM1  
COM2  
COM3  
COM4/S74  
1
2
3
79  
80  
1
Segment outputs for displaying the display data transferred  
by serial data input.  
The S1/P1 to S4/P4 pins can be used as general-purpose  
output ports under serial data control.  
O
O
-
-
OPEN  
OPEN  
4
2
5 ~ 53  
54  
55  
56  
57  
3 ~ 51  
52  
53  
54  
Common driver outputs  
The frame frequency fo is given by: fo = (fOSC/512)Hz.  
55  
Key scan outputs  
Although normal key scan timing lines require diodes to be  
inserted in the timing lines to prevent shorts, since these  
outputs are unbalanced CMOS transistor outputs, these  
outputs will not be damaged by shorting when these outputs  
are used to form a key matrix. The KS1/S54 and KS2/S55  
pins can be used as segment outputs when so specified by  
the control data.  
58  
59  
60 ~  
63  
56  
57  
58 ~  
61  
KS1/S54  
KS2/S56  
KS3 ~ KS6  
O
-
OPEN  
Key scan inputs  
These pins have built-in pull-down resistors.  
Oscillator connection  
An oscillator circuit is formed by connecting an external  
resistor and capacitor at this pin.  
64 ~  
68  
62 ~  
66  
KI1 ~ KI5  
OSC  
I
H
GND  
VDD  
I/O  
-
75  
73  
Serial data interface connections to the controller. Note that  
DO, being an open-drain output, requires a pull-up resistor.  
CE: Chip enable  
CL: Synchronization clock  
DI: Transfer data  
CE  
CL  
DI  
I
I
H
78  
79  
80  
77  
76  
77  
78  
75  
GND  
I
-
-
DO  
O
OPEN  
DO: Output data  
Reset signal input  
/RES=low ---- Display off  
Key scan disabled  
/RES  
I
L
VDD  
All key data is reset to low  
76  
74  
/RES=high --- Display on  
Key scan enabled  
However, serial data can be transferred when /RES is low.  
This pin must be connected to ground  
Used for applying the LCD drive 2/3 bias voltage externally.  
Must be connected to VLCD2 when a 1/2 bias drive scheme  
is used.  
TEST  
I
I
-
-
-
74  
71  
72  
69  
VLCD1  
OPEN  
Used for applying the LCD drive 1/3 bias voltage externally.  
Must be connected to VLCD1 when a 1/2 bias drive scheme  
is used.  
Logic block power supply connection. Provide a voltage of  
between 3.3 and 6.0V.  
VLCD2  
VDD  
I
-
-
OPEN  
-
72  
69  
70  
67  
-
LCD driver block power supply connection. Provide a voltage  
of between VDD-0.5 and 6.0V.  
Power supply connection. Connect to ground.  
VLCD  
VSS  
-
-
-
-
-
-
70  
73  
68  
71  
PT6584 V1.1  
- 7 -  
August, 2006