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LCD Driver IC
PT6584
ALLOWABLE OPERATING RANGES
(Ta=-40 to +85℃, VSS=0V)
Parameter
Symbol
VDD
VLCD
VLCD1
VLCD2
VIH1
Condition
Min
3.3
VDD-0.5
-
Typ
-
-
2/3VLCD
1/3VLCD
Max
6.0
6.0
VLCD
VLCD
6.0
Unit
V
V
V
V
V
V
VDD
Supply voltage
VLCD
VLCD1
VLCD2
Input voltage
-
CE, CL, DI, /RES
KI1 to KI5
0.8 VDD
0.6 VDD
-
-
Input high level voltage
Input low level voltage
VIH2
VLCD
VIL
CE, CL, DI, /RES, KI1 to KI5
OSC
0
-
-
0.2 VDD
-
V
Recommended external resistance
Recommended external
capacitance
ROSC
43
KΩ
COSC
OSC
-
680
-
pF
Guaranteed oscillator range
Data setup time
Data hold time
CE wait time
CE setup time
fosc
tds
tdh
tcp
tcs
tch
t∅H
t∅L
tr
OSC
CL,DI: Figure 4
25
160
160
160
160
160
160
160
-
50
-
-
-
-
-
-
100
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
-
-
-
-
-
-
CL, DI: Figure 4
CE, CL: Figure 4
CE, CL: Figure 4
CE, CL: Figure 4
CL: Figure 4
CE hold time
High level clock pulse width
Low level clock pulse width
Rise time
CL: Figure 4
-
CE, CL, DI: Figure 4
CE, CL, DI: Figure 4
DO, RPU=4.7KΩ,
CL=10pf (see note): Figure 4
DO, RPU=4.7KΩ,
CL=10pf (see note): Figure 4
160
160
Fall time
tf
-
DO output delay time
DO rise time
tdc
tdr
-
-
-
-
1.5
1.5
µs
µs
Note:
Since DO is an open-drain output, these values depend on the resistance of the pull-up resistor RPU
and the load capacitance CL.
PT6584 V1.1
- 31 -
August, 2006