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PT6314-16 参数 Datasheet PDF下载

PT6314-16图片预览
型号: PT6314-16
PDF下载: 下载PDF文件 查看货源
内容描述: 点字符VFD控制器/驱动器IC [Dot Character VFD Controller/Driver IC]
分类和应用: 驱动器控制器
文件页数/大小: 49 页 / 1045 K
品牌: PTC [ PRINCETON TECHNOLOGY CORP ]
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Tel: 886-2-66296288  
Fax: 886-2-29174598  
URL: http://www.princeton.com.tw  
Dot Character VFD Controller/Driver IC  
PT6314  
PIN DESCRIPTION  
Pin Name I/O  
Description  
Pin No.  
VDD2  
VSS2  
VDD1  
OSCO  
OSC2  
OSC1  
-
-
-
VFD Driving Power Supply Pin  
VFD Driving Power Supply Pin  
Logic Power Supply Pin  
1, 36  
2, 35  
3
4
5
6
O Oscillation Signal Output Pin  
O Oscillation Output Pin  
I
Oscillation Input Pin  
Reset Pin  
/RESET  
TEST  
I
When this pin is set to “0”, all internal registers and commands are  
initialized. The Segment and Grid Outputs are fixed to VDD.  
Test Pin  
0 or floating : the Normal Operation Mode  
1:the Test Mode is active  
7
8
I
I
I
Display Line Select Pin  
This pin is used to select the number of display lines when  
Power is ON, Reset or Resetting.  
the  
DLS  
9
0: 1 line is selected (N=”0”)*  
1: 2 lines are selected (N=”1”)*  
Duty Select Pin  
DS1, DS0  
These pins set the duty ratio. The duty ratio is determined by the  
number of Grid.  
10, 11  
Read/Write (Write) Signal Pin  
Under the M68 Parallel Data Transfer Mode (R/W), this pin functions as  
the Data Transfer Select Pin.  
0: Write Function 1: Read Function  
R/W(/WR)  
RS/STB  
I
I
I
12  
13  
14  
Under the i80 parallel data Transfer Mode (/WR), this pin is Write  
Enable Pin. It writes data at the rising edge of this signal.  
Under the Serial Transfer Mode, the Read or Write function is selected  
by instruction and this pin is connect to either “H” or “L”.  
Register Select/Strobe Pin  
Under the Parallel Transfer Mode is selected, this pin acts as the  
Register Select Pin.  
0:Instruction Register (IR) 1: Data register (DR)  
Under Serial Data Transfer Mode, this pin acts as the Strobe Input Pin.  
Enable (Read)/Shift Clock  
Under the M68 Parallel Data Transfer Mode (E), this pin functions as  
the Write Enable Pin. Data is written at the falling edge.  
Under the i80 Parallel Data Transfer Mode (/RD), this pin functions as  
the Read Enable Pin. When this pin is set to “LOW”, data is outputted to  
the Data Bus.  
E(/RD)/SCK  
Under the Serial Data Transfer Mode, this pin functions as the Shift  
Clock Input Pin. Data is written at the rising edge.  
Note: *=N is the Display Line Select Flag in “Function Set” Command  
PT6314 V1.3  
- 4 -  
March, 2006  
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