PE43503
Product Specification
Figure 18. Evaluation Board Schematic
Peregrine Specification 102-0379
VDD
4
6
1
2
4
1
2
4
1
2
4
1
2
4
1
2
4
1
2
4
1
2
D6
3
P/S
5
D0
3
D1
3
D2
3
D3
3
D4
3
D5
3
D6
D3
D4
P/ S
D0
D1
J1
HEADER 14
2
4
6
8
10
12
14
2
4
6
8
10
12
14
1
3
5
7
9
11
13
1
3
5
7
9
11
13
D0
D1
D2
D3
D4
D5
D6
C5
100pF
C1
100pF
J3
CON2
1
2
C9
0.1µF
C10
100pF
C8
100pF
VDD
C2
100pF
D2
C6
100pF
C3
100pF
C7
100pF
C4
SERIAL
HEADER 4
CLK
DATA
LE
1
2
3
4
CLOCK
DATA
LE
GND
D1
D2
D3
D4
D5
D6
D5
4
24
23
22
21
20
C8
C1
C2
C4
D0
CP5
C16
100pF
19
1
2
3
4
5
CP25
VDD
S/P
GND
RF1
GND
GND
GND
GND
GND
GND
GND
U1
43X0X DSA 50 Ohm 4x4 MLP24
SI
CLK
LE
GND
RF2
GND
18
17
16
15
14
13
Z=50 Ohm
1
2
J5
SMA
VDD
P/S
C13
100pF
C14
100pF
J4
SMA
1
De-embeding trace
Z=50 Ohm
1
2
1
2
2
Z=50 Ohm
6
7
8
9
10
11
J6
SMA
J7
SMA
Note: Capacitors C1-C8, C13, & C14 may be omitted.
Figure 19. Package Drawing
Document No. 70-0252-05
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©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
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