欢迎访问ic37.com |
会员登录 免费注册
发布采购

PE42412A-X 参数 Datasheet PDF下载

PE42412A-X图片预览
型号: PE42412A-X
PDF下载: 下载PDF文件 查看货源
内容描述: [SP12T RF Switch, 10 MHz–8 GHz]
分类和应用:
文件页数/大小: 25 页 / 1175 K
品牌: PSEMI [ Peregrine Semiconductor ]
 浏览型号PE42412A-X的Datasheet PDF文件第7页浏览型号PE42412A-X的Datasheet PDF文件第8页浏览型号PE42412A-X的Datasheet PDF文件第9页浏览型号PE42412A-X的Datasheet PDF文件第10页浏览型号PE42412A-X的Datasheet PDF文件第12页浏览型号PE42412A-X的Datasheet PDF文件第13页浏览型号PE42412A-X的Datasheet PDF文件第14页浏览型号PE42412A-X的Datasheet PDF文件第15页  
PE42412  
SP12T RF Switch  
Control Logic  
Table 5 provides the control logic truth table for PE42412.  
Table 5 • Truth Table for PE42412  
RFC– RFC– RFC– RFC– RFC– RFC– RFC– RFC– RFC– RFC– RFC– RFC–  
RF1 RF2 RF3 RF4 RF5 RF6 RF7 RF8 RF9 RF10 RF11 RF12  
LS(1)  
V4 V3 V2 V1  
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
ON  
OFF  
ON  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
X(2)  
OFF  
Notes:  
1) LS has an internal 1 Mpull-up resistor to logic high. Connect LS to GND externally to generate a logic 0. Leaving LS floating will generate a  
logic 1.  
2) LS = don’t care, V4 = 0, V3 = 0, V2 = V1 = 1, all ports are terminated to provide an all isolated state.  
DOC-75868-3 – (03/2017)  
Page 11  
www.psemi.com