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PT0864DRN-0 参数 Datasheet PDF下载

PT0864DRN-0图片预览
型号: PT0864DRN-0
PDF下载: 下载PDF文件 查看货源
内容描述: 外形尺寸与框图 [OUTLINE DIMENSION & BLOCK DIAGRAM]
分类和应用:
文件页数/大小: 65 页 / 1282 K
品牌: POWERTIP [ POWERTIP TECHNOLOGY ]
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ST7066U  
!"Interfacing to the MPU  
The ST7066U can send data in either two 4-bit operations or one 8-bit operation, thus allowing interfacing with 4-  
or 8-bit MPU.  
#" For 4-bit interface data, only four bus lines (DB4 to DB7) are used for transfer. Bus lines DB0 to DB3  
are disabled. The data transfer between the ST7066U and the MPU is completed after the 4-bit data has  
been transferred twice. As for the order of data transfer, the four high order bits (for 8-bit operation, DB4 to  
DB7) are transferred before the four low order bits (for 8-bit operation, DB0 to DB3). The busy flag must be  
checked (one instruction) after the 4-bit data has been transferred twice. Two more 4-bit operations then  
transfer the busy flag and address counter data.  
$" Example of busy flag check timing sequence  
RS  
R/W  
E
Internal  
operation  
Functioning  
Not  
Busy  
DB7  
IR7  
IR3  
AC3  
AC3  
IR7  
IR3  
Instruction write  
Busy flag check  
Busy flag check  
Instruction write  
$" Intel 8051 interface  
16  
COM1 to COM16  
4
P1.0 to P1.3  
DB4 to DB7  
P3.0  
P3.1  
P3.2  
RS  
R/W  
E
40  
SEG1 to SEG40  
Intel 8051 Serial  
ST7066U  
V2.0  
2001/03/01  
27/42  
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