LNK362-364
CY1
100 pF
250 VAC
L1
1 mH
T1
EE16 9
C4
330
µF
16 V
D5
1N4934
8
NC NC
D1
1N4005
D2
1N4005
R1
3.9 k
1/8 W
VR1
BZX79-
B5V1
5.1 V, 2%
R2
390
Ω
1/8 W
J4
6.2 V,
322 mA
J3
4
5
3
J1
RF1
8.2
Ω
2.5 W
85-265
VRMS
C1
3.3
µF
400 V
C2
3.3
µF
400 V
J2
LinkSwitch-XT
U1
LNK362P
D3
1N4005
D4
1N4005
D
FB
BP
U2
PC817A
R3
1k
1/8 W
S
L2
1 mH
C3
100 nF
50 V
PI-4162-110205
Figure 5. 2 W Universal Input CV Adapter Using LNK362.
Applications Example
A 2 W CV Adapter
The schematic shown in Figure 5 is a typical implementation of
a universal input, 6.2 V
±7%,
322 mA adapter using LNK362.
This circuit makes use of the
Clampless
technique to eliminate the
primary clamp components and reduce the cost and complexity
of the circuit.
The
EcoSmart
features built into the
LinkSwitch-XT
family
allow this design to easily meet all current and proposed
energy efficiency standards, including the mandatory California
Energy Commission (CEC) requirement for average operating
efficiency.
The AC input is rectified by D1 to D4 and
fi
ltered by the bulk
storage capacitors C1 and C2. Resistor RF1 is a
fl
ameproof,
fusible, wire wound type and functions as a fuse, inrush current
limiter and, together with the
π
fi
lter formed by C1, C2, L1
and L2, differential mode noise attenuator. Resistor R1 damps
ringing caused by L1 and L2.
This simple input stage, together with the frequency jittering of
LinkSwitch-XT,
a low value Y1 capacitor and PIʼs
E-Shield™
windings within T1, allow the design to meet both conducted
and radiated EMI limits with
>10
dBµV margin. The low value
of CY1 is important to meet the requirement for a very low
touch current (the line frequency current that
fl
ows through
CY1) often specified for adapters, in this case
<10 µA.
The rectified and
fi
ltered input voltage is applied to the primary
winding of T1. The other side of the primary is driven by the
integrated MOSFET in U1. No primary clamp is required as the
low value and tight tolerance of the LNK362 internal current
limit allows the transformer primary winding capacitance to
provide adequate clamping of the leakage inductance drain
voltage spike.
The secondary of the
fl
yback transformer T1 is rectified by D5,
a low cost, fast recovery diode, and
fi
ltered by C4, a low ESR
capacitor. The combined voltage drop across VR1, R2 and the
LED of U2 determines the output voltage. When the output
voltage exceeds this level, current will
fl
ow through the LED
of U2. As the LED current increases, the current fed into the
FEEDBACK pin of U1 increases until the turnoff threshold
current (~49
µA)
is reached, disabling further switching cycles
of U1. At full load, almost all switching cycles will be enabled,
and at very light loads, almost all the switching cycles will be
disabled, giving a low effective frequency and providing high
light load efficiency and low no-load consumption.
Resistor R3 provides 1 mA through VR1 to bias the Zener
closer to its test current. Resistor R2 allows the output voltage
to be adjusted to compensate for designs where the value of the
Zener may not be ideal, as they are only available in discrete
voltage ratings. For higher output accuracy, the Zener may be
replaced with a reference IC such as the TL431.
4
C
12/05
POWERINT [ POWER INTEGRATIONS, INC. ]
