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LNK302DG 参数 Datasheet PDF下载

LNK302DG图片预览
型号: LNK302DG
PDF下载: 下载PDF文件 查看货源
内容描述: 使用LinkSwitch -TN系列元件数最少,节能艾菲cient离线式开关IC [LinkSwitch-TN Family Lowest Component Count, Energy-Effi cient Off-Line Switcher IC]
分类和应用: 开关
文件页数/大小: 20 页 / 712 K
品牌: POWERINT [ Power Integrations ]
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LNK302/304-306  
Pre-load Resistor R4  
Quick Design Checklist  
In high-side, direct feedback designs where the minimum load  
is <3 mA, a pre-load resistor is required to maintain output  
regulation. This ensures sufcient inductor energy to pull the  
inductor side of the feedback capacitor C3 to input return via  
D2. The value of R4 should be selected to give a minimum  
output load of 3 mA.  
As with any power supply design, all LinkSwitch-TN designs  
should be veried for proper functionality on the bench. The  
following minimum tests are recommended:  
1) Adequate DC rail voltage – check that the minimum DC  
inputvoltagedoesnotfallbelow70VDCatmaximumload,  
minimum input voltage.  
2) Correct Diode Selection – UF400x series diodes are  
recommended only for designs that operate in MDCM at  
an ambient of 70 °C or below. For designs operating in  
continuousconductionmode(CCM)and/orhigherambients,  
then a diode with a reverse recovery time of 35 ns or better,  
such as the BYV26C, is recommended.  
3) Maximum drain current – verify that the peak drain current  
is below the data sheet peak drain specication under  
worst-case conditions of highest line voltage, maximum  
overload (just prior to auto-restart) and highest ambient  
temperature.  
4) Thermal check – at maximum output power, minimum  
input voltage and maximum ambient temperature, verify  
that the LinkSwitch-TN SOURCE pin temperature is  
100 °C or below. This gure ensures adequate margin due  
to variations in RDS(ON) from part to part. Abattery powered  
thermocouplemeterisrecommendedtomakemeasurements  
whentheSOURCEpinsareaswitchingnode.Alternatively,  
the ambient temperature may be raised to indicate margin  
to thermal shutdown.  
In designs with an optocoupler the Zener or reference bias  
current provides a 1 mA to 2 mA minimum load, preventing  
“pulse bunching” and increased output ripple at zero load.  
LinkSwitch-TN Layout Considerations  
In the buck or buck-boost converter conguration, since the  
SOURCEpinsinLinkSwitch-TNareswitchingnodes,thecopper  
area connected to SOURCE should be minimized to minimize  
EMI within the thermal constraints of the design.  
In the boost conguration, since the SOURCE pins are tied  
to DC return, the copper area connected to SOURCE can be  
maximized to improve heatsinking.  
The loop formed between the LinkSwitch-TN, inductor (L1),  
freewheeling diode (D1), and output capacitor (C2) should  
be kept as small as possible. The BYPASS pin capacitor  
C1 (Figure 6) should be located physically close to the  
SOURCE (S) and BYPASS (BP) pins. To minimize direct  
coupling from switching nodes, the LinkSwitch-TN should be  
placed away from AC input lines. It may be advantageous to  
place capacitors C4 and C5 in-between LinkSwitch-TN and the  
AC input. The second rectier diode D4 is optional, but may  
be included for better EMI performance and higher line surge  
withstand capability.  
InaLinkSwitch-TNdesignusingabuckorbuckboostconverter  
topology, the SOURCE pin is a switching node. Oscilloscope  
measurements should therefore be made with probe grounded  
to a DC voltage, such as primary return or DC input rail, and  
not to the SOURCE pins. The power supply input must always  
be supplied from an isolated source (e.g. via an isolation  
transformer).  
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Rev. I 11/08  
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