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INT202PFI2 参数 Datasheet PDF下载

INT202PFI2图片预览
型号: INT202PFI2
PDF下载: 下载PDF文件 查看货源
内容描述: 低侧驱动器和高侧控制同时导通 [Low-side Drive and High-side Control for Simultaneous Conduction]
分类和应用: 驱动器
文件页数/大小: 12 页 / 92 K
品牌: POWERINT [ Power Integrations ]
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INT202  
General Circuit Operation  
The three-phase switched reluctance  
motor drive circuit shown in Figure 4  
illustrates a typical application for the  
INT202/201. The LS IN signal directly  
controlsMOSFETQ1. TheHS INsignal  
causes the INT202 to command the  
INT201toturnMOSFETQ2onoroffas  
required.  
The length of time that the high-side can  
remain on is limited by the size of the  
bootstrap capacitor. Applications with  
extremely long high-side on times  
require special techniques discussed in  
AN-10.  
voltage switching, gate charge, and bias  
power. Figure 5 indicates the maximum  
switching frequency as a function of  
inputvoltageandgatecharge. Forhigher  
ambient temperatures, the switching  
frequency should be derated linearly.  
Maximum frequency of operation is  
limitedbypowerdissipationduetohigh-  
Local bypassing for the low-side driver  
isprovidedbyC1. Bootstrapbiasforthe  
high-side driver is provided by D1 and  
C2. Slew rate and effects of parasitic  
oscillations in the load waveforms are  
controlled by resistors R1 and R2.  
400  
400  
PDIP  
SOIC  
V
V
V
= 200 V  
= 300 V  
= 400 V  
V
V
V
= 200 V  
= 300 V  
= 400 V  
IN  
IN  
IN  
IN  
IN  
IN  
300  
200  
100  
0
300  
200  
100  
0
Theinputsaredesignedtobecompatible  
with 5 V CMOS logic levels and should  
notbeconnectedtoVDD. NormalCMOS  
power supply sequencing should be  
observed. Theorderofsignalapplication  
should be VDD, logic signals, and then  
HV+. VDD should be supplied from a  
low impedance voltage source.  
0
100  
Gate Charge (nC)  
200  
0
100  
Gate Charge (nC)  
200  
Figure 5. Switching Frequency versus Gate Charge for a) PDIP and b) SOIC.  
F
2/96  
4