INT201
HV+
8
7
6
5
Q2
R2
PHASE 2
C2
INT201
D1
1
8
2
3
4
5
PHASE 1
V
DD
7
6
PHASE 3
C1
INT200
Q1
3-PHASE
BRUSHLESS
DC MOTOR
HS IN
1
2
3
4
R1
LS IN
HV-
PI-1467-042695
Figure 4. Using the INT200 and INT201 in a 3-phase Configuration.
General Circuit Operation
One phase of a three-phase brushless
DCmotordrivecircuitisshowninFigure
4 to illustrate an application of the
INT200/201. The LS IN signal directly
controlsMOSFETQ1. TheHS INsignal
causes the INT200 to command the
INT201toturnMOSFETQ2onoroffas
required. The INT200 will ignore input
signals that would command both Q1
and Q2 to conduct simultaneously,
protecting against shorting the HV+ bus
to HV-.
The INT201 is latched on and off by the
edges of the appropriate low-side logic
signal (HS INfor the INT200 andHS IN
for the INT202). The high-side driver
willlatchoffandstayoffifthebootstrap
capacitor discharges below the
undervoltage lockout threshold.
Undervoltage lockout-induced turn off
can occur during conditions such as
powerrampup,motorstart,orlowspeed
operation.
C
vs. ON TIME
BOOTSTRAP
1000
100
10
Local bypassing for the low-side driver
isprovidedbyC1. Bootstrapbiasforthe
high-side driver is provided by D1 and
C2. Slew rate and effects of parasitic
oscillations in the load waveforms are
controlled by resistors R1 and R2.
Q
= 100 nC
G
1
Q
= 20 nC
G
0.1
Theinputsaredesignedtobecompatible
with 5 V CMOS logic levels and should
notbeconnectedtoVDD. NormalCMOS
power supply sequencing should be
observed. Theorderofsignalapplication
should be VDD, logic signals, and then
HV+.
0.01
0.01
0.1
High Side ON Time (ms)
Figure 5. High-side On Time versus Bootstrap Capacitor.
1
10
100
F
2/96
3
POWERINT [ Power Integrations ]
