InnoSwitch-CH
0 V
VSRTH
0 V
VSRTH
VD
VD
PI-8392-082317
PI-8393-080917
Figure 16. Unacceptable FORWARD Pin Waveform After Handshake With
SR MOSFET Conduction During Flyback Cycle.
Figure 19. Acceptable FORWARD Pin Waveform Before Handshake With Body
Diode Conduction During Flyback Cycle.
SR MOSFET Operation and Selection
Although a simple diode rectifier and filter is adequate for the
secondary-winding, use of a SR MOSFET enables significant improve-
ment in operating efficiency often required to meet the European CoC
and the U.S. DoE energy efficiency requirements.
The secondary-side controller turns on the SR MOSFET once the
flyback cycle begins. The SR MOSFET gate should be tied directly to
the SYNCHRONOUS RECTIFIER DRIVE pin of the InnoSwitch-CH IC
and no additional resistors should be connected in the gate circuit of
the SR MOSFET.
0 V
VSRTH
The SR MOSFET is turned off once the drain voltage of the SR
MOSFET drops below -24 mV [VSR(TH)]. Therefore the use of MOSFETs
with a very small RDS(ON) can be counterproductive as it reduces the
MOSFET on-time, commutating the current to the body diode of the
MOSFET or an external parallel Schottky diode if used.
VD
PI-8393-080917
A MOSFET with 18 mΩ RDS(ON) is a good choice for designs rated for
5 V, 2 A output. The SR MOSFET driver uses the secondary SECOND-
ARY BYPASS pin for its supply rail and this voltage is typically 4.4 V.
A MOSFET with too high a threshold voltage is therefore not suitable
and MOSFETs with a low threshold voltage of 1.5 V to 2.5 V are ideal
although MOSFETs with a threshold voltage (absolute maximum) as
high as 4 V may be used.
Figure 17. Acceptable FORWARD Pin Waveform After Handshake With
SR MOSFET Conduction During Flyback Cycle.
There is a slight delay between the commencement of the flyback
cycle and the turn-on of the SR MOSFET. During this time, the body
diode of the SR FET conducts. If an external parallel Schottky diode
is used, this current mostly flows through the Schottky diode. Once
the InnoSwitch-CH IC detects end of the flyback cycle, voltage across
SR MOSFET RDS(ON) drops below 24 mV, the remaining portion of the
flyback cycle is completed with the current commutating to the body
diode of the SR MOSFET or the external parallel Schottky diode.
0 V
VSRTH
Use of the Schottky diode parallel to the SR MOSFET may be added
to provide higher efficiency and typically a 1 A surface mount
Schottky diode is often adequate. The gains are modest, for a 5 V,
2 A design the external diode adds ~0.1% to full load efficiency at
85 VAC and ~0.2% at 230 VAC.
VD
t1
t2
PI-8394-080917
Figure 18. Unacceptable FORWARD Pin Waveform Before Handshake With
Body Diode Conduction During Flyback Cycle.
The voltage rating of the Schottky diode and the SR MOSFET should
be at least 1.3 to 1.4 times the expected peak inverse voltage (PIV)
based on the turns ratio used for the transformer. 60 V rated
MOSFETs and diodes are suitable for most 5 V designs that use a
VOR <60 V.
Note:
If t1 + t2 = 1.5 ms ± 50 ns, the controller may fail the handshake and
trigger a primary bias winding OVP latch-off.
11
Rev. J 10/17
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