DI-58
• Tomaintainthe±25%CCtolerancetheprimaryinductance
tolerance should be tighter than ±10%.
• Minimize zero load consumption by reducing drain node
capacitance: Use double coated/grade 2 wire for primary
anddonotvacuumimpregnate.AvoidusinganRCsnubber
across the output diode.
• For resistive loads, increase C3 to 1 µF (electrolytic) to
allow adequate time for start-up at full load.
• For battery loads, an output LC filter is typically not
required but can be added for resistive loads to reduce
switching ripple.
TRANSFORMER PARAMETERS
TDK PC40 EE13,
ALG= 101 nH/T2
Core
Bobbin
EE13 Horizontal 8 pin
Primary: 104T, 34 AWG
Shield: 12T, 2 x 30 AWG
Secondary: 15T, 30 AWG T.I.W.
Flux Band: 1T, 6 mm Cu foil
(T.I.W.: Triple Insulated Wire)
Winding Details
Secondary (5-6), tape, Shield
(3-4), tape, Primary
(4-1), tape, Flux band
(3-NC)
Winding Order
(pin numbers)
• R1 can be replaced with an inductor for higher efficiency
(~10% increase).
• Adding a 1 mA to 2 mA pre-load reduces zero load voltage
by ~1 V but increases power consumption by ~10 mW.
Inductance
Primary: 1.36 mH ±10%, Leakage: 50 µH (max.)
Primary Resonant
Frequency
300 kHz (minimum)
•
Diode D4 can be replaced with a Schottky for higher
efficiency.
Table 1. Transformer Construction Information.
• See AN-35 for more information.
0.3
0.25
0.2
10
VIN = 85 VAC
VIN = 265 VAC
Low Limit
8
6
4
2
0
High Limit
0.15
0.1
0.05
0
50
100
Input Voltage (VAC)
Figure 3. No-load Input Power Consumption.
150
200
250
300
0
0.1
0.2
0.3
0.4
Output Current (A)
Figure 2. Load Regulation - CV/CC Characteristics
with Limits.
A
9/03
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