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DI-31 参数 Datasheet PDF下载

DI-31图片预览
型号: DI-31
PDF下载: 下载PDF文件 查看货源
内容描述: 5 V , 70瓦的DC -DC转换器采用同步整流 [5 V, 70 W DC-DC Converter with Synchronous Rectification]
分类和应用: 转换器
文件页数/大小: 2 页 / 54 K
品牌: POWERINT [ Power Integrations ]
 浏览型号DI-31的Datasheet PDF文件第1页  
DI-31  
• Minimize primary and secondary high current loop areas  
to reduce parasitic inductance.  
TRANSFORMER PARAMETERS  
• Optocoupler U2 should have a controlled CTR range of  
100 to 200% for optimum loop stability.  
EFD25, 3F3  
Gap for ALG = 1100 nH/T2  
Core Material  
• Size transformer reset components to ensure transformer  
reset at minimum operating voltage without exceeding  
170 V drain voltage at high line. It may be necessary to gap  
T1 to offset effect of Q4-Q6 gate capacitance.  
• Set Zener VR1 clamp voltage to 150 V to both safely limit  
the DRAIN below BVDSS and guarantee transformer reset.  
• Select number of bias turns to provide 12 V to 14 V at  
minimum input voltage and full load.  
EFD25 10 pin  
(B&B B-025 or equivalent)  
Bobbin  
Bias: 5T, 30 AWG  
Primary: 6T+ 5T, 4 x 26 AWG  
Secondary: 3T, 0.005" Cu foil  
Winding Details  
Primary (3-2), tape, Bias (4-5), tape,  
Secondary (6,7-9,10), tape,  
Primary (2-1), tape  
Winding Order  
(Pin Numbers)  
• Main primary power return should be connected to the  
DPA-Switch tab, not to the SOURCE pin.  
Primary: 130 µH ±10%,  
Leakge: 10 µH (max)  
Inductance  
• Scale time constant of C9 and L2 to allow C9 to reset  
completely during minimum on-time conditions.  
• Consult AN-31 for additional design tips and information.  
Primary Resonant  
Frequency  
3 MHz (minimum)  
Table 1. Transformer Design Parameters.  
92  
90  
88  
86  
OUTPUT INDUCTOR PARAMETERS  
EE22, TDK PC40 Material  
Gap for ALG of 250 nH/T2  
Core  
Bobbin  
TDK BE-22-5116  
4T, 0.016" Cu foil  
4 µH ± 10%  
Winding Details  
Inductance  
84  
82  
80  
VIN = 36 VDC  
VIN = 48 VDC  
VIN = 60 VDC  
VIN = 72 VDC  
Table 2. Output Inductor Construction Information.  
0
20  
40  
60  
80  
Output Power (W)  
Figure 2. Efficiency vs. Output Power.  
For the latest updates, visit our Web site: www.powerint.com  
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability.  
Power Integrations does not assume any liability arising from the use of any device or circuit described herein, nor does it convey any  
license under its patent rights or the rights of others. The products and applications illustrated herein may be covered by one or more U.S.  
and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power  
Integrations’ patents may be found at www.powerint.com.  
The PI Logo, TOP S w it c h , Tin yS w it c h , Lin k S w it c h and Ec o S m a rt are registered trademarks of Power Integrations, Inc.  
P I Ex p e rt is a trademark of Power Integrations, Inc. ©Copyright 2002, Power Integrations, Inc.  
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B
12/02  
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