DI-18
• Tomaintainthe±20%CCtolerancetheprimaryinductance
tolerance should be tighter than ±10%.
• Minimize zero load consumption by reducing drain node
capacitance: Use double coated/grade 2 wire for primary
anddonotvacuumimpregnate.AvoidusinganRCsnubber
across the output diode.
• For resistive loads increase C3 to 1 µF (electrolytic) to
allow adequate time for start-up at full load.
• For battery loads an output π filter is typically not required
but can be added for resistive loads to reduce switching
ripple.
• L1 can be replaced with a 22 Ω to 100 Ω fusible resistor for
lower cost but lower efficiency (~10% reduction).
• Adding a 1 mA to 2 mA pre-load reduces zero load voltage
by ~1V but increases power consumption by ~10 mW.
• DiodeD6canbereplacedwithaPNdiodeforlowercostbut
reduced efficiency.
TRANSFORMER PARAMETERS
TDK PC40 EE13,
ALG=190 nH/T2
Core
Bobbin
EE13 Horizontal 8 pin
Primary: 104T, 34 AWG
Shield: 12 T, 2 x 30 AWG
Secondary: 15T, 30 AWG T.I.W.
Flux Band: 1T, 6 mm Cu foil
(T.I.W.: Triple Insulated Wire)
Winding Details
Secondary (5-6), tape, Shield
(3-4), tape, Primary
(4-1), tape, Flux band
(3-NC)
Winding Order
(pin numbers)
Inductance
Primary: 2.55 mH ±10%, Leakage: 50 µH (max.)
Primary Resonant
Frequency
300 kHz (minimum)
Table 1. Transformer Construction Information.
• See AN-35 and EPR-16 for more information.
10
0.3
0.25
0.2
VIN=85 V
VIN=115 V
VIN=265 V
VIN=185 V
8
6
4
2
0
0.15
0.1
0.05
0
85 VAC: 174 mW
115 VAC: 179 mW
185 VAC: 211 mW
230 VAC: 229 mW
265 VAC: 250 mW
0.7
0
0.1
0.3
0.5 0.6
0.2
0.4
50
100
Input Voltage (VAC)
Figure 3. No-load Input Power Consumption.
150
200
250
300
Output Current (A)
Figure 2. Load Regulation - CV/CC Characteristics with Limits.
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