DI-102
^
$ R + R
4
h
5
V + V
L
Design Formulae
^
Q1(BE)h
R5
VIN(th)
=
Component values are calculated as follows:
VC - V
R6
VOV_OFF
=
b
IOV_OFF
-
L l $ RLS + VL
IEEE 802.3af overvoltage requiements are:
VOV_OFF = 63 VDC
VIN(th) = 60 VDC
Input voltage turn-off
OVSD becomes active
Key Design Points
From the DPA-Switch data sheet we have the following:
• 1 % accuracy resistors should be used to maintain the
highest accuracy for the OV on and off thresholds.
• To avoid interfering with the under-voltage thresholds, the
voltage VIN(th), must be programmed above under-voltage
levels.
IOV_OFF = 135 µA
This is the L-pin current at which
the device turns off
L-pin voltage at IL = IOV_OFF
Control-pin voltage
VL = 2.5 VDC
VC = 5.8 VDC
• The DMAX limit of the DPA-Switch linearly decreases with
increasing input voltage (increasing L-pin current), when
using only resistor RLS for under/overvoltage detection.
However when the overvoltage threshold is modified with
additional circuitry, this will effectively change the DMAX
limitproportionallyatvoltagesabovethethresholdvoltage
(VIN(th)). The power supply designer should therefore make
sure that the power supply can still deliver the required
power with the reduced maximum duty cycle at high line.
Assumptions:
V
= 0.7 VDC
Transistor base-emitter voltage
Transistor minimum current gain
This is the ratio of transistor bias
versus collector current (larger K
gives stronger bias)
β Q=1(B1E0) 0
K = 10
Resistor values R4, R5 and R6 are calculated as:
V
OV_OFF - VL - V $ b
^
Q1(BE)h
R4 $
R5 $
R6 =
IOV_OFF $ K
V + V
Q1(BE)h
L
$ R
^
OV_OFF - VL - VQ1(BE)
4
V
^
h
VL - VC $ RLS
OV_OFF - IOV_OFF $ RLS - VL
V
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not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND
SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. The products and applications illustrated herein (transformer construction and
circuits external to the products) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to
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