DER-37
16W Adapter using TOP245P
April 27, 2004
4 Circuit Description
The schematic in Figure 2 shows an off-line flyback converter using the TOP245P. The
circuit is designed for 90 VAC to 265 VAC input and provides an isolated 5.25V, 3A
continuous output.
To provide <100m W no-load consumption at 230 VAC, a frequency reduction circuit is
implemented using the X pin feature of the TOPSwitch-GX. More details of this operation
provided below.
4.1 Input EMI Filtering
Conducted EMI filtering is provided by pi formed filter C4, C7, L2, & L3. The switching
frequency jitter feature of the TOPSwitch-GX family allows the use of a small, low cost
common mode choke for L2.
To keep the peak DRAIN voltage acceptably below the BVDSS (700V) of U1, diode D2, C5
and R1&R2 form a primary clamp. This network clamps the voltage spike seen on the
DRAIN due to primary and secondary reflected leakage inductance. Diode D3 and
capacitor C8 provide rectified and filtered bias supply for U1.
4.2 Output Rectification
The secondary of T1 is rectified and filtered by D1, & C3. Post filter choke L1 and C6
provide additional high frequency filtering and help suppress high frequency EMI.
4.3 Output Feedback
DC feedback to the output voltage regulator error amplifier (U3) comes from a divider
network R8 and R16. The center point is tied to the 2.5 V REF pin of U2. Capacitor C11
and resistor R12 roll off the high frequency gain of U3 while R5 sets the overall gain.
In a typical TOPSwitch-GX design, regulation of the output is normally provided by
voltage mode PWM control. The current into the CONTROL pin sets the duty cycle of the
internal MOSFET. The duty cycle control operates over a CONTROL pin current of 2mA
to 6mA. Current below this level is used to supply power to the IC.
In this design the control is accomplished by employing the externally programmable
current limit function of the TOPSwitch-GX family, which is the X pin. This allows the
TOPSwitch-GX to operate at lower frequency in order to further improve light load
efficiency.
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