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DP8105 参数 Datasheet PDF下载

DP8105图片预览
型号: DP8105
PDF下载: 下载PDF文件 查看货源
内容描述: 8V至14V输入, 0.7V至5.5V的输出 [8V to 14V Input , 0.7V to 5.5V Output]
分类和应用:
文件页数/大小: 35 页 / 2952 K
品牌: POWER-ONE [ POWER-ONE ]
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DP8105 5A DC-DC Intelligent dPOL Data Sheet
8V to 14V Input
0.7V to 5.5V Output
7.2.1
Turn-On Delay
Turn-on delay is defined as an interval from the
application of the Turn-On command until the output
voltage starts ramping up.
R/W-0
DON7
Bit 7
R/W-0
DON6
R/W-0
DON5
R/W-0
DON4
R/W-0
DON3
R/W-0
DON2
R/W-0
DON1
R/W-0
DON0
Bit 0
Bit 7:0
DON[7:0]:
Turn-on delay time
00h: corresponds to 0ms delay after turn-on command has occurred
FFh: corresponds to 255ms delay after turn-on command has occurred
Figure 17. Turn-On Delay Register DON
Figure 15 Transient response with non-zero Regulation.
The Load Regulation parameter is an important part
of Current Sharing. It is used to set one dPOL as a
"master", by assigning a lower mV/A load regulation
than all other dPOLs which share the load as
"slaves". The dPOL with the lowest Regulation
parameter sets the effective overall regulation. (See
Current Sharing elsewhere in this document.)
7.2
Sequencing and Tracking
7.2.2
Turn-Off Delay
Turn-off delay is defined as an interval from the
application of the Turn-Off command until the output
voltage reaches zero (if the falling slew rate is
programmed) or until both high side and low side
switches are turned off (if the slew rate is not
programmed). Therefore, for the slew rate controlled
turn-off the ramp-down time is included in the turn-off
delay as shown in Figure 18.
User programmed turn-off delay, T
DF
Turn-on delay, turn-off delay, and rising and falling
output voltage slew rates can be programmed in the
dPOL Configure Sequencing window shown in
Figure 16 or directly via the I2C bus by writing into
the DON, DOF, and TC registers, respectively. The
registers are shown in Figure 17, Figure 19, and
Figure 20.
Turn-Off
Command
Internal
ramp-down
command
V
OUT
Calculated
delay T
D
Ramp-down time, T
F
Ramp-down time, T
Falling slew
rate dV
F
/dT
Time
Figure 18. Relationship between Turn-Off Delay and Falling
Slew Rate
As it can be seen from the figure, the internally
calculated delay T
D
is determined by the equation
below.
V
T
D
=
T
DF
OUT
,
dV
F
dT
For proper operation T
D
shall be greater than zero.
The appropriate value of the turn-off delay needs to
be programmed to satisfy the condition.
If the falling slew rate control is not utilized, the turn-
off delay only determines an interval from the
application of the Turn-Off command until both high
side and low side switches are turned off. In this
case, the output voltage ramp-down process is
determined by load parameters.
Figure 16. dPOL Configure Sequencing Window
BCD.00261 Rev. 1.0, 12 Feb 2013
www.power-one.com
Page 13 of 35