OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
PO54G374A, PO74G374A
10/22/07
54, 74 Series GHz Logic
Test Waveforms
V
I
Timing
Input
t
w
V
I
Input
V
M
V
M
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Data Input
t
su
V
M
t
h
V
I
V
M
0V
V
M
0V
V
I
Input
t
PLH
Output
t
PHL
Output
V
M
V
M
V
M
V
M
0V
t
PHL
V
OH
V
M
V
OL
t
PLH
V
OH
V
M
V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Control
t
PZL
V
I
V
M
V
M
0V
t
PLZ
V
LOAD
/2
V
M
t
PZH
V
OL
+ V
Δ
t
PHZ
V
M
V
OH
- V
Δ
V
OH
≈0
V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
V
OL
Output
Waveform 1
S1 at V
LOAD
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
Test Circuit
Vcc
Pulse
Generator
D.U.T
50
Ω
50pF
to
2pF
4
Copyright
© Potato Semiconductor Corporation
POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
