DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
WITH CLEAR AND PRESET
PO74G112A
04/19/09
74 Series GHz Logic
Power Supply Characteristics
Symbol
Description
Quiescent Power Supply Current
Test Conditions (1)
Vcc=Max, Vin=Vcc or GND
Min
Typ
Max
Unit
Icc
Q
Notes:
1.
2.
3.
4.
-
0.1
40
uA
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at Vcc = 3.3V, 25°C ambient.
This parameter is guaranteed but not tested.
Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
Capacitance
Parameters (1)
Description
Input Capacitance
Output Capacitance
Test Conditions
Vin = 0V
Vout = 0V
Typ
Unit
Cin
Cout
Notes:
4
6
pF
pF
1 This parameter is determined by device characterization but not production tested.
Switching Characteristics
Symbol
Description
Setup time before CLK
Hold time, data after CLK
Propagation Delay CLK to Q
Propagation Delay CLK to Q
Rise/Fall Time
Input Frequency
CL = 15pF
CL = 15pF
0.8V – 2.0V
CL=2pF - 15pF
Test Conditions (1)
M ax
t
su
t
h
t
PLH
t
PHL
tr/tf
fmax
Notes:
-
-
Min
Unit
0.5
0.5
ns
ns
ns
ns
ns
MHz
2
2
0.8
-
-
-
-
750
1. See test circuits and waveforms.
2.
t
PLH
,
t
PHL
,
t
su, and
t
h are production tested. All other parameters guaranteed but not production tested.
3. Airflow of 1m/s is recommended for frequencies above 500MHz
3
Copyright
© Potato Semiconductor Corporation
POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
